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參數(shù)資料
| 型號： | UPG2008TB-E3 |
| 廠商： | NEC Corp. |
| 英文描述： | GaAs INTEGRATED CIRCUIT |
| 中文描述： | 砷化鎵集成電路 |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 60K |
| 代理商： | UPG2008TB-E3 |
Data Sheet PG10193EJ01V0DS
3
μ
PG2008TB
ELECTRICAL CHARACTERISTICS
(T
A
= +25
°
C, V
cont1
= +3 V, V
cont2
= 0 V or V
cont1
= 0 V, V
cont2
= +3 V, Z
O
= 50
, Off chip DC blocking
capacitors value; 51 pF, unless otherwise specified)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Insertion Loss
L
INS
f = 0.5 to 1.0 GHz
0.30
0.55
dB
f = to 2.0 GHz
0.40
0.65
dB
f = to 2.5 GHz
0.90
dB
Isolation
ISL
f = 0.5 to 2.0 GHz
22
27
dB
f = to 2.5 GHz
18
dB
Input Return Loss
RL
in
f = 0.5 to 2.0 GHz
13
19
dB
f = to 2.5 GHz
11
dB
Output Return Loss
RL
out
f = 0.5 to 2.0 GHz
13
19
dB
f = to 2.5 GHz
11
dB
Input Power at 0.1 dB
P
in(0.1 dB)
f = 1.0 GHz, V
cont
= +3 V/0 V
23.0
dBm
Compression Point
Note
Input Power at 1 dB
P
in(1 dB)
f = 1.0 GHz, V
cont
= +3 V/0 V
22.0
26.5
dBm
Compression Point
Note
Switching Speed
t
SW
50
200
ns
Control Current
I
cont
V
cont
= +3 V/0 V, RF Non
0.5
10
μ
A
Note
P
in(0.1 dB)
or P
in(1 dB)
is measured the input power level when the insertion loss increase more 0.1 dB or 1 dB
than that of linear range. All other characteristics are measured in linear range.
Cautions 1. When the
μ
PG2008TB is used it is necessary to use DC blocking capacitors for No.1 (OUT1),
No.3 (OUT2) and No.5 (IN). The value of DC blocking capacitors should be chosen to
accommodate the frequency of operation, bandwidth, switching speed and the condition with
actual board of your system.
The range of recommended DC blocking capacitor value is less than 100 pF.
2. The distance between IC’s GND pin and ground pattern of substrate should be as shorter as
possible to avoid parasitic parameters.
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