參數資料
型號： UPSD3253BV-40T1T
廠商： 意法半導體
英文描述： Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM
中文描述： 閃存可編程系統設備與8032微控制器核心和256Kbit的SRAM
文件頁數： 65/176頁
文件大?。?/td> 1214K
代理商： UPSD3253BV-40T1T
65/176
μPSD325X DEVICES
1. RI = 0, and
2. Either SM2 = 0, or the received 9th data bit = 1
If either of these conditions is not met, the received
frame is irretrievably lost, and RI is not set. If both
conditions are met, the received 9th data bit goes
into RB8, and the first 8 data bits go into SBUF.
One bit time later, whether the above conditions
were met or not, the unit goes back to looking for
a 1-to-0 transition at the RxD input.
Figure 27. Serial Port Mode 0, Block Diagram
AI06824
Zero Detector
Internal Bus
Tx Control
T
Rx Control
7 6 5 4 3 2 1 0
Internal Bus
SBUF
Write
to
SBUF
Read
SBUF
Load
SBUF
SBUF
Input Shift Register
Shift
Shift
Clock
Serial
Port
Interrupt
S6
REN
R1
Rx Clock
Start
Tx Clock
Start
Shift
Shift
Send
Receive
R
CL
D
S
Q
RxD
P3.0 Alt
Input
Function
RxD
P3.0 Alt
Output
Function
TxD
P3.1 Alt
Output
Function
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