參數(shù)資料
型號： UPSD3253BV-40T1T
廠商： 意法半導(dǎo)體
英文描述： Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM
中文描述： 閃存可編程系統(tǒng)設(shè)備與8032微控制器核心和256Kbit的SRAM
文件頁數(shù)： 91/176頁
文件大?。?/td> 1214K
代理商： UPSD3253BV-40T1T
91/176
μPSD325X DEVICES
Table 65. USB Interrupt Enable Register (UIEN: 0E9h)
Table 66. Description of the UIEN Bits
Table 67. USB Interrupt Status Register (UISTA: 0E8h)
7
6
5
4
3
2
1
0
SUSPNDI
RSTE
RSTFIE
TXD0IE
RXD0IE
TXD1IE
EOPIE
RESUMI
Bit
Symbol
R/W
Function
7
SUSPNDI
R/W
Enable SUSPND interrupt
6
RSTE
R/W
Enable USB Reset; also resets the CPU and PSD Modules when bit is
set to ’1.’
5
RSTFIE
R/W
Enable RSTF (USB Bus Reset Flag) Interrupt
4
TXD0IE
R/W
Enable TXD0 interrupt
3
RXD0IE
R/W
Enable RXD0 interrupt
2
TXD1IE
R/W
Enable TXD1 interrupt
1
EOPIE
R/W
Enable EOP interrupt
0
RESUMI
R/W
Enable USB resume interrupt when it is the Suspend Mode
7
6
5
4
3
2
1
0
SUSPND
—
RSTF
TXD0F
RXD0F
TXD1F
EOPF
RESUMF
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