參數(shù)資料
型號: V6123
廠商: Electronic Theatre Controls, Inc.
英文描述: Digitally Programmable 2, 4 and 8 Mux LCD Driver
中文描述: 數(shù)字可編程2,4和8復用器LCD驅動器
文件頁數(shù): 3/19頁
文件大?。?/td> 1479K
代理商: V6123
V6123
3
Column Drivers
Outputs
FR Polarity
Column Data
Measured
Guaranteed
S1 to S60
S1 to S60
logic 1
logic 0
logic 1
logic 1
| Sx* - V
| V
LCD
- Sx* |
| V
LCD
- Sx* | = | Sx* - V
SS
| ± 25 mV
S1 to S60
S1 to S60
logic 1
logic 0
logic 0
logic 0
| V
- Sx* |
| Sx* - V
SS
|
| V
LCD
- Sx* | = | Sx* - V
SS
| ± 25 mV
*Sx = the out put num ber (I.e. S1 to S60)
Ta ble 4a
Row Drivers
Outputs
FR Polarity
Row Data
Measured
Guaranteed
S1 to Sn*
S1 to Sn*
logic 1
logic 0
logic 1
logic 1
| V
- Sx |
| Sx - V
ss |
| V
LCD
- Sx | = | Sx - V
SS
| ± 25 mV
S1 to Sn*
S1 to Sn*
logic 1
logic 0
logic 0
logic 0
| Sx - V
|
| V
LCD
- Sx |
| V
LCD
- Sx | = | Sx - V
SS
| ± 25 mV
*n= the V6123 mux programme num ber (i.e. 2, 4 or 8)
Ta ble 4b
Timing Characteristics
V
DD
= 5 V ± 10%, V
LCD
= 2 to 8.5 V, and T
A
= -40 °C to +85 °C
Parameter
Symbol Test Conditions
Min.
Typ.
Max.
Units
Clock high pulse width
Clock low pulse width
Clock and FR rise time
Clock and FR fall time
Data input setup time
Data input hold time
Data output propagation
STR pulse width
FR (internal frame frequency)
t
CH
t
CL
t
CR
t
CF
t
DS
t
DH
t
PD
t
STR
f
FR2)
120
120
ns
ns
ns
ns
ns
ns
ns
μs
Hz
2000
200
200
20
1)
30
1)
C
LOAD
= 50 pF
200
65
6
T
A
= 25 °C
45
55
1)
t
DS
+ t
DH
min mum must be
100 ns. If t
DS
= 20 ns then t
DH
80 ns.
Ta ble 5a
2)
V6123 n, FR = n times the de sired LCD re resh rate where n is the V6123 mux mode num ber.
See fig. 14, 15 for more de ails con cern ng frame fre quency.
V
DD
= 2 to 6V, V
LCD
= 2 to 8.5 V, and T
A
= -40 °C to +85 °C
Parameter
Symbol Test Conditions
Min.
Typ.
Max.
Units
Clock high pulse width
Clock low pulse width
Clock and FR rise time
Clock and FR fall time
Data input setup time
Data input hold time
Data output propagation
STR pulse width
t
CH
t
CL
t
CR
t
CF
t
DS
t
DH
t
PD
t
STR
0.5
0.5
μs
μs
ns
ns
NS
ns
ns
μs
1.5
200
200
100
1)
150
1)
C
LOAD
= 50 pF
500
16
1)
t
DS
+ t
DH
min mum must be
500 ns. If t
DS
= 100 ns then t
DH
400 ns.
Ta ble 5b
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