參數(shù)資料
型號(hào): W238-02
英文描述: Clocks and Buffers
中文描述: 時(shí)鐘和緩沖器
文件頁(yè)數(shù): 4/18頁(yè)
文件大?。?/td> 182K
代理商: W238-02
W238-02
Document #: 38-07103 Rev. *A
Page 4 of 18
How to use PD# input to support VTT_PWRGD
The PD# input can be used to support the VTT_PWRGD sig-
nal specified in the Intel VRM 8.5 specification. The
VTT_PWRGD is used to indicated that the frequency select
output pins (BSEL[0:1]) from the CPU are valid and the clock
generator can use them to determine the CPU FSB frequency.
The assertion of PD# input pin during initial power-up will delay
the start of the PLL, keep all the multiplexed I/O pins as input
and keep all the output inactive. The functionality of PD# will
allow the system designer to use this input to support the
VTT_PWRGD output from the VRM 8.5 module. Please refer
to the
Figure 2
for power-up sequence details.
3.3V & 2.5V
PD# (connected to
VTT_PWRGD)
Outputs
Input Latch
(pin 4 & pin21)
1 ms
PLL & Output
Synchronization
Figure 2. Power-up sequence with PD# (VTT_PWRGD) hold LOW
相關(guān)PDF資料
PDF描述
W238 Clocks and Buffers
W23C4096-12 x8 ROM (Mask Programmable)
W23C4096-15 x8 ROM (Mask Programmable)
W23C4096-20 x8 ROM (Mask Programmable)
W23C8192-12 x8 ROM (Mask Programmable)
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W23C4096-12 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 ROM (Mask Programmable)
W23C4096-15 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 ROM (Mask Programmable)
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