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參數(shù)資料
| 型號： | W3HG256M72AER403AD6MG |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | DRAM |
| 英文描述： | 256M X 72 DDR DRAM MODULE, 0.6 ns, DMA240 |
| 封裝： | ROHS COMPLIANT, RDIMM-240 |
| 文件頁數(shù)： | 14/14頁 |
| 文件大?。?/td> | 256K |
| 代理商： | W3HG256M72AER403AD6MG |
W3HG256M72AER-AD6
9
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
February 2007
Rev. 1
DDR2 SDRAM COMPONENT AC TIMING PARAMETERS & SPECIFICATION (Continued)
0°C ≤ TCASE < +85°C; VCCQ = + 1.8V ± 0.1V, VCC = +1.8V ± 0.1V
AC CHARACTERISTICS
SYMBOL
806
665
534
403
UNIT
Notes
PARAMETER
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
Self
Refresh
Refresh to Active or Refresh to
Refresh command interval
tRFC
TBD
127.5
70,000
127.5
70,000
127.5
70,000
ns
14, 37
Average periodic refresh
interval (commercial)
tREFI
TBD
7.8
s
Average periodic refresh
interval (industrial)
tREFIT
TBD
3.9
s
Exit self refresh to non-read
command
tXSNR
TBD
tRFC (MIN)
+ 10
tRFC (MIN)
+ 10
tRFC (MIN)
+ 10
ns
Exit self refresh to read
command
tXSRD
TBD
200
tCK
37
Exit self refresh timing
reference
tISXR
TBD
tIS
ps
6, 27
ODT
ODT turn-on delay
tAOND
TBD
222222
tCK
37
ODT turn-on
tAON
TBD
tAC
(MIN)
tAC
(MAX)
+ 700
tAC
(MIN)
tAC
(MAX)
+ 1,000
tAC
(MIN)
tAC
(MAX)
+ 1,000
ps
23, 43
ODT turn-off delay
tAOFD
TBD
2.5
tCK
35, 37
ODT turn-off
tAOF
TBD
tAC
(MIN)
tAC
(MAX)
+ 600
tAC
(MIN)
tAC
(MAX)
+ 600
tAC
(MIN)
tAC
(MAX)
+ 600
ps
24, 44
ODT turn-on (power-down
mode)
tAONPD
TBD
tAC
(MIN) +
2000
2 x tCK
+ tAC
(MAX)
+ 1000
tAC
(MIN) +
2000
2 x tCK
+ tAC
(MAX)
+ 1000
tAC
(MIN) +
2000
2 x tCK
+ tAC
(MAX)
+ 1000
ps
ODT turn-off (power-down
mode)
tAOFPD
TBD
tAC
(MIN) +
2000
2.5
x tCK
+ tAC
(MAX)
+ 1000
tAC
(MIN) +
2000
2.5
x tCK
+ tAC
(MAX)
+ 1000
tAC
(MIN) +
2000
2.5
x tCK
+ tAC
(MAX)
+ 1000
ps
ODT to power-down entry
latency
tANPD
TBD
333
tCK
37
ODT power-down exit latency
tAXPD
TBD
888
tCK
37
ODT enable from MRS
command
tMOD
TBD
12
ns
37, 49
Power-Down
Exit active power-down to
READ command, MR[bit12=0]
tXARD
TBD
222
tCK
37
Exit active power-down to
READ command, MR[bit12=1]
tXARDS
TBD
7 - AL
6 - AL
tCK
37
Exit precharge power-down to
any non-READ command.
tXP
TBD
222
tCK
37
CKE minimum high/low time
tCKE
TBD
333
tCK
32, 37
NOTE:
AC specication is based on
MICRON components. Other DRAM manufactures specication may be different.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W3HG264M72EER403AD7XG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR2 SDRAM REGISTERED, w/PLL, VLP Mini-DIMM |
| W3HG264M72EER534AD7XG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR2 SDRAM REGISTERED, w/PLL, VLP Mini-DIMM |
| W3HG264M72EER665AD7XG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR2 SDRAM REGISTERED, w/PLL, VLP Mini-DIMM |
| W3HG264M72EER806AD7XG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR2 SDRAM REGISTERED, w/PLL, VLP Mini-DIMM |
| W3HG264M72EER-AD7 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR2 SDRAM REGISTERED, w/PLL, VLP Mini-DIMM |
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