參數(shù)資料
型號: W530H
英文描述: Analog IC
中文描述: 模擬IC
文件頁數(shù): 3/8頁
文件大?。?/td> 184K
代理商: W530H
W530
3
Table 1. Frequency Configuration Table
Table 2. Modulation Percentage Selection Table
Overview
The W530 product is one of a series of devices in the Cypress
PREMIS family. The PREMIS family incorporates the latest
advances in PLL spread spectrum frequency synthesizer tech-
niques. By frequency modulating the output with a low fre-
quency carrier, peak EMI is greatly reduced. Use of this tech-
nology allows systems to pass increasingly difficult EMI testing
without resorting to costly shielding or redesign.
In a system, not only is EMI reduced in the various clock lines,
but also in all signals which are synchronized to the clock.
Therefore, the benefits of using this technology increase with
the number of address and data lines in the system. The Sim-
plified Block Diagram shows a simple implementation.
Functional Description
The W530 uses a Phase Locked Loop (PLL) to frequency
modulate an input clock. The result is an output clock whose
frequency is slowly swept over a narrow band near the input
signal. The basic circuit topology is shown in
Figure 1
. The
input reference signal is divided by Q and fed to the phase
detector. A signal from the VCO is divided by P and fed back
to the phase detector also. The PLL will force the frequency of
the VCO output signal to change until the divided output signal
and the divided reference signal match at the phase detector
input. The output frequency is then equal to the ratio of P/Q
times the reference frequency. (Note: For the W530 the output
frequency is nominally equal to the input frequency.) The
unique feature of the Spread Spectrum Frequency Timing
Generator is that a modulating waveform is superimposed at
the input to the VCO. This causes the VCO output to be slowly
swept across a predetermined frequency band.
Because the modulating frequency is typically 1000 times
slower than the fundamental clock, the spread spectrum pro-
cess has little impact on system performance.
Frequency Selection With SSFTG
In Spread Spectrum Frequency Timing Generation, EMI re-
duction depends on the shape, modulation percentage, and
frequency of the modulating waveform. While the shape and
frequency of the modulating waveform are fixed for a given
frequency, the modulation percentage may be varied.
Using frequency select bits (FS2:1 pins), the frequency range
can be set (see
Table 2
). Spreading percentage is set with pins
MW as shown in
Table 2
.
A larger spreading percentage improves EMI reduction. How-
ever, large spread percentages may either exceed system
maximum frequency ratings or lower the average frequency to
a point where performance is affected. For these reasons,
spreading percentage options are provided.
Range of Fin
Frequency
Min.
14
14
14
25
25
25
50
50
50
Reserved
Power Down Hi-Z
Power Down 0
Power Down 1
Multiplier Set-
tings
OR2
0
1
1
0
1
1
0
1
1
0
0
0
0
Output /
Input
Range of Fout
Min.
14
28
56
13
25
50
13
25
50
N/A
N/A
N/A
N/A
Required R Set-
tings
IR2
0
0
0
1
1
1
1
1
1
As Set
As Set
As Set
As Set
Modulation & Power
Down Settings
MW2
Table 2
Table 2
Table 2
Table 2
Table 2
Table 2
Table 2
Table 2
Table 2
1
1
0
0
Max.
30
30
30
60
60
60
120
120
120
OR1
1
0
1
1
0
1
1
0
1
0
0
0
0
Max.
30
60
120
30
60
120
30
60
120
N/A
N/A
N/A
N/A
IR1
1
1
1
0
0
0
1
1
1
As Set
As Set
As Set
As Set
MW1
1
2
4
0.5
1
2
0.25
0.5
1
N/A
N/A
N/A
N/A
0
1
0
1
EMI Reduction
Modulation Setting
MW2
0
0
1
1
Bandwith Limit Frequencies as a % Value of Fout
MW0 = 0
Low
High
98.75%
100%
99.375%
97.5%
100%
95.0%
100%
90.0%
100%
MW0 = 1
MW1
0
1
0
1
Low
High
Minimum EMI Control
Suggested Setting
Alternate Setting
Maximum EMI reduction
100.625%
101.25%
102.5%
105%
98.75%
97.5%
95%
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