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參數資料
| 型號： | W65C134S8PL-8 |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8位微控制器 |
| 文件頁數： | 38/60頁 |
| 文件大?。?/td> | 711K |
| 代理商： | W65C134S8PL-8 |
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WESTERN DESIGN CENTER
W65C134S
March 1, 2000
33
2.10 Address Bus (Axx)
Ports 0 and 1 are also the address bus A0-A15 when configured by the Bus Control Register (BCR). (See section
1.4 for BCR mode selection.) When BCR0 and BCR7 are set to "1" and BCR3=0 (normal operating mode) for
external memory addressing, Axx are all "1's" when addressing on-chip memory. When BCR3=1 (ICE mode), the
address bus is always active so that the ICE can trace internal read and write operations.
2.11 Data Bus (Dx)
Port 2 is the data bus D0-D7 when configured by the Bus Control Register (BCR). (See section 1.4 for BCR mode
selection.) When BCR0 and BCR7 are set to a "1" and BCR3=0 (normal operating mode) for external memory
addressing, Dx are all "1's" when addressing on-chip memory. When BCR3=1 (ICE mode), the data bus is always
active so that the ICE can trace internal read and write operations. During external memory cycles the data bus is in
the Hi-Z state during PHI2 low time.
2.12 Positive Edge Interrupt inputs (PExx)
Port pins P44, P45, P50, P51, P54, P55, and P56 have the Positive Edge sensitive interrupt inputs (PE44, PE45,
PE50, PE51, PE54, PE55, and PE56) multiplexed with the I/O. When the pin is enabled as an edge interrupt (as
defined by the Bus Control Register (BCR)), an interrupt is generated, and the associated bit is set (by an internal
one-shot circuit) in the Interrupt Flag Register (IFRx) on a positive transition from "0" to "1". The transition from
"1" to "0" has no effect on the IFR. When the associated Interrupt Enable Register bit (IERx) is set to a "1", the
MPU will be interrupted provided the interrupt flag bit in the MPU status register P (I flag) is cleared to a "0".
When the I flag is "1", interrupts are disabled.
2.13 Negative Edge Interrupt inputs (NExx)
Port pins P46, P47, P52, P53, and P57 have the Negative Edge sensitive interrupt inputs (NE46, NE47, NE52,
NE53, and NE57) multiplexed with the I/O. When the pin is enabled as an edge interrupt (as defined by the Bus
Control Register (BCR)), an interrupt is generated, and the associated bit is set (by an internal one-shot circuit) in
the Interrupt Flag Register (IFRx) on a negative transition from "1" to "0". The transition from "0" to "1" has no
effect on the IFR. When the associated Interrupt Enable Register bit (IERx) is set to a "1", the MPU will be
interrupted provided the interrupt flag bit in the MPU status register P (I flag) is cleared to a "0". When I equals a
"1", interrupts are disabled.
2.14 Chip Select outputs (active low) (CSxB)
The CSxB Chip Select outputs are enabled (individually) as outputs on Port 3 with the PCS3x (Port 3 Chip Select
register). Chip select 7, CS7B, is also automatically enabled by BCR7=1. Each of the eight chip selects is dedicated
to one block of external memory; the mapping of each chip select to external addresses is given in Table 1-3 System
Memory Map. Chip selects CS3B, CS4B, CS5B, CS6B, and CS7B are considered "clocked" chip selects. This
means that they only become active during PHI2 high time. Chip selects CS0B, CS1B, and CS2B are "not clocked,"
and are active anytime the address bus is in the appropriate memory block.
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PDF描述 |
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| W65C134S8Q-8 | 8-BIT MICROCONTROLLER |
| W65C134SPL-8 | 8-BIT MICROCONTROLLER |
| W65C134SQ-8 | 8-BIT MICROCONTROLLER |
| W65C29P-6 | I/O Controller |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| W65C134S8PLG-14 | 制造商:Western Design Center (WDC) 功能描述:8-bit Microcontrollers - MCU 8-bit Microcontroller |
| W65C134S8PLG-8 | 功能描述:8位微控制器 -MCU 8-bit Microcontroller RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| W65C134S8Q-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| W65C134SPL-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| W65C134SQ-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
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