![](http://datasheet.mmic.net.cn/230000/W742E811_datasheet_15631148/W742E811_26.png)
Preliminary W742C(E)811
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Fosc/4
Fosc/1024
Enable
Disable
1. Reset
2. CLR EVF,#02H
3. Reset MR0.3 to 0
4. MOV TM0L,R or MOV TM0H,R
8-Bit Binary
Down Counter
(Timer 0)
S
R
Q
HEF.1
IEF.1
Hold mode release (HCF.1)
Timer 0 interrupt (INT1)
1. Reset
2. CLR EVF,#02H
3.Set MR0.3 to 1
EVF.1
MR0.0
Set MR0.3 to 1
4
4
MOV TM0H,R
MOV TM0L,R
Figure 5-6 Organization of Timer 0
5.12.2 Timer 1 (TM1)
Timer 1 (TM1) is also a programmable 8-bit binary down counter, as shown in Figure 5-7. Timer 1 can
output an arbitrary frequency to the MFP pin. The input clock of Timer 1 can be one of three sources:
F
OSC
/64, F
OSC
or F
S
. The source can be selected by setting bit 0 and bit 1 of mode register 1 (MR1). At
initial reset, the Timer 1 clock input is F
OSC
. When the MOV TM1L, R or MOV TM1H,R instruction is
executed, the specified data are loaded into the auto-reload buffer and the TM1 down-counting will be
disabled that is MR1.3 is reset to 0 at the same time. If the bit 3 of MR1 is set (MR1.3 = 1), the content
of the auto-reload buffer will be loaded into the TM1 down counter, and Timer 1 starts to down count, and
the event flag 7 is reset (EVF.7 = 0). When the timer decrements to 0FFH, it will generate an underflow
(EVF.7 = 1) and be auto-reloaded with the specified data, after which it will continue to count down.
Then, if interrupt enable flag 7 has been set to 1 (IEF.7 = 1), an interrupt is executed; if hold mode
release enable flag 7 is set to 1 (HEF.7 = 1), the hold state is terminated. The specified frequency of
Timer 1 can be delivered to the MFP output pin by programming bit 2 of MR1. Bit 3 of MR1 can be used
to make Timer 1 stop or start counting.
In a case where Timer 1 clock input is F
T
:
Desired Timer 1 interval = (preset value +1) / F
T
Desired frequency for MFP output pin = F
T
÷
(preset value + 1)
÷
2 (Hz)
Preset value: Decimal number of Timer 1 preset value
F
OSC
: Clock oscillation frequency