- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄68747 > W9425G6EH-6 (WINBOND ELECTRONICS CORP) 16M X 16 DDR DRAM, 0.7 ns, PDSO66 PDF資料下載
參數(shù)資料
| 型號： | W9425G6EH-6 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | DRAM |
| 英文描述： | 16M X 16 DDR DRAM, 0.7 ns, PDSO66 |
| 封裝： | 0.400 INCH, ROHS COMPLIANT, TSOP2-66 |
| 文件頁數(shù)： | 34/54頁 |
| 文件大?。?/td> | 0K |
| 代理商： | W9425G6EH-6 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁當(dāng)前第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁
W9425G6EH
Publication Release Date:Dec. 03, 2008
- 4 -
Revision A08
1. GENERAL DESCRIPTION
W9425G6EH is a CMOS Double Data Rate synchronous dynamic random access memory (DDR
SDRAM), organized as 4,194,304 words
× 4 banks × 16 bits. W9425G6EH delivers a data bandwidth
of up to 500M words per second (-4). To fully comply with the personal computer industrial standard,
W9425G6EH is sorted into the following speed grades: -4, -5, -5I, -6 and -6I. The -4 is compliant to the
DDR500/CL3 and CL4 specification. The -5/-5I is compliant to the DDR400/CL3 specification (the -5I
grade which is guaranteed to support -40°C ~ 85°C). The -6/-6I is compliant to the DDR333/CL2.5
specification (the -6I grade which is guaranteed to support -40°C ~ 85°C).
All Input reference to the positive edge of CLK (except for DQ, DM and CKE). The timing reference
point for the differential clock is when the CLK and CLK signals cross during a transition. Write and
Read data are synchronized with the both edges of DQS (Data Strobe).
By having a programmable Mode Register, the system can change burst length, latency cycle,
interleave or sequential burst to maximize its performance. W9425G6EH is ideal for main memory in
high performance applications.
2. FEATURES
2.5V
±0.2V Power Supply for DDR333/400
2.6V
±0.1V Power Supply for DDR500
Up to 250 MHz Clock Frequency
Double Data Rate architecture; two data transfers per clock cycle
Differential clock inputs (CLK and CLK )
DQS is edge-aligned with data for Read; center-aligned with data for Write
CAS Latency: 2, 2.5, 3 and 4
Burst Length: 2, 4 and 8
Auto Refresh and Self Refresh
Precharged Power Down and Active Power Down
Write Data Mask
Write Latency = 1
7.8S refresh interval (8K/64 mS refresh)
Maximum burst refresh cycle: 8
Interface: SSTL_2
Packaged in TSOP II 66-pin, using Lead free materials with RoHS compliant
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W9425G6EH-4 | 16M X 16 DDR DRAM, 0.7 ns, PDSO66 |
| W9864G6GB-6I | 4M X 16 SYNCHRONOUS DRAM, 5.5 ns, PBGA60 |
| WE256K32-250G2TMEA | 256K X 32 EEPROM 5V MODULE, 250 ns, CQFP68 |
| WE256K32-200G2TCE | 256K X 32 EEPROM 5V MODULE, 200 ns, CQFP68 |
| WE256K32-300G2TIE | 256K X 32 EEPROM 5V MODULE, 300 ns, CQFP68 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W9425G6JB-5 | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR SDRAM 256M-Bit 16Mx16 2.5V 60-Pin TFBGA 制造商:Winbond Electronics 功能描述:IC MEMORY 制造商:Winbond Electronics Corp 功能描述:IC MEMORY 制造商:Winbond 功能描述:16MX16,256Mb DDRI DRAM ,200MHZ, BGA |
| W9425G6JB-5 TR | 制造商:Winbond Electronics Corp 功能描述:256M DDR SDRAM X16, 200MHZ |
| W9425G6JB-5I | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR SDRAM 256M-Bit 16Mx16 2.5V 制造商:Winbond Electronics 功能描述:IC MEMORY 制造商:Winbond Electronics Corp 功能描述:IC MEMORY |
| W9425G6JB-5I TR | 制造商:Winbond Electronics Corp 功能描述:256M DDR SDRAM X16, 200MHZ, IN |
| W9425G6JH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:4 M × 4 BANKS × 16 BITS DDR SDRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。