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W986432EH / W9864G2EH
Publication Release Date: August 17 ,2005
- 3 -
Revision A09
1.
GENERAL DESCRIPTION
W986432EH is a high-speed synchronous dynamic random access memory (SDRAM), organized as
512K words
× 4 banks × 32 bits. Using pipelined architecture and 0.13 μm process technology,
W986432EH delivers a data bandwidth of up to 800M bytes per second (-5). For different application,
W986432EH is sorted into the following speed grades: -5, -6, -7. The -5 parts can run up to 200
MHz/CL3. The -6 parts can run up to 166 MHz/CL3. The -7 parts can run up to 143 MHz/CL3.
Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be
accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE
command. Column addresses are automatically generated by the SDRAM internal counter in burst
operation. Random column read is also possible by providing its address at each clock cycle. The
multiple bank nature enables interleaving among internal banks to hide the precharging time.
By having a programmable Mode Register, the system can change burst length, latency cycle,
interleave or sequential burst to maximize its performance. W986432EH is ideal for main memory in
high performance applications.
2.
FEATURES
3.3V±0.3V Power Supply.
Interface : LVTTL.
Four banks operation.
MRS cycle with address key programs.
- CAS latency (2 & 3).
- Burst length (1, 2, 4, 8 & Full page).
- Burst type (Sequential & Interleave).
All inputs are sampled at the positive going edge of the system clock .
Burst read single-bit write operation.
DQM for masking.
Auto & self refresh.
64ms refresh period (4K cycle).
W9864G2EH is using Lead free materials , RoHS compliant
3.
AVAILABLE OPTIONS
PART NUMBER
SPEED
SELF REFRESH
CURRENT (MAX.)
TEMPERATURE
RANGE
W986432EH-5
200MHz/CL3
3mA
0°C
70 °C
W986432EH-6
166MHz/CL3
3mA
0°C
70 °C
W986432EH-7
143MHz/CL3
3mA
0°C
70 °C