參數(shù)資料
型號(hào): WM9712LEFT
廠商: Wolfson Microelectronics
元件分類: Codec
英文描述: AC97 Audio and Touchpanel CODEC
中文描述: AC97音頻編解碼器和觸摸屏
文件頁(yè)數(shù): 34/78頁(yè)
文件大?。?/td> 689K
代理商: WM9712LEFT
WM9712L
DIGITAL AUDIO (SPDIF) OUTPUT
Production Data
w
PD Rev 4.0 December 2003
34
The WM9712L supports the SPDIF standard using pin 47 as its output. Note that pin 47 can also be
used as a GPIO pin. The GE5 bit (register 56h, bit 5) selects between GPIO and SPDIF functionality
(see “GPIO and Interrupt control” section).
Register 3Ah is a read/write register that controls SPDIF functionality and manages bit fields
propagated as channel status (or sub-frame in the V case). With the exception of V, this register
should only be written to when the SPDIF transmitter is disabled (SPDIF bit in register 2Ah is ‘0’).
Once the desired values have been written to this register, the contents should be read back to
ensure that the sample rate in particular is supported, then SPDIF validity bit SPCV in register 2Ah
should be read to ensure the desired configuration is valid. Only then should the SPDIF enable bit in
register 2Ah be set. This ensures that control and status information start up correctly at the
beginning of SPDIF transmission.
REGISTER
ADDRESS
2Ah
Extended
Audio
BIT
LABEL
DEFAULT
DESCRIPTION
10
5:4
SPCV
SPSA
0
01
SPDIF validity bit (read-only)
SPDIF slot assignment (ADCO = 0)
00: Slots 3, 4
01: Slots 6, 9
10: Slots 7, 8
11: Slots 10, 11
SPDIF output enable
1 = enabled, 0 = disabled
Validity bit; ‘0’ indicates frame valid, ‘1’
indicates frame not valid
Indicates that the WM9712L does not support
double rate SPDIF output (read-only)
Indicates that the WM9712L only supports
48kHz sampling on the SPDIF output (read-
only)
Generation level; programmed as required by
user
Category code; programmed as required by
user
Pre-emphasis; ‘0’ indicates no pre-emphasis,
‘1’ indicates 50/15us pre-emphasis
Copyright; ‘0’ indicates copyright is not
asserted, ‘1’ indicates copyright
Non-audio; ‘0’ indicates data is PCM, ‘1’
indicates non-PCM format (e.g. DD or DTS)
Professional; ‘0’ indicates consumer, ‘1’
indicates professional
Source of SPDIF data
0: SPDIF data comes from SDATAOUT (pin
5), slot selected by SPSA
1: SPDIF data comes from audio ADC
2
SEN
0
15
V
0
14
DRS
0
13:12
SPSR
10
11
L
0
10:4
CC
0000000
3
PRE
0
2
COPY
0
1
AUDIB
0
3Ah
SPDIF
Control
Register
0
PRO
0
5Ch
Additional
Function
Control
4
ADCO
0
Table 22 SPDIF Output Control
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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