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參數(shù)資料
| 型號： | X1228V14Z-4.5A |
| 廠商： | INTERSIL CORP |
| 元件分類： | XO, clock |
| 英文描述： | 16 Characters x 1 Lines, 5x7 Dot Matrix Character and Cursor |
| 中文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO14 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MO-153AC, TSSOP-14 |
| 文件頁數(shù)： | 6/31頁 |
| 文件大?。?/td> | 569K |
| 代理商： | X1228V14Z-4.5A |
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X1228
REV 1.3 3/24/04
Characteristics subject to change without notice.
6 of 31
www.xicor.com
AC Specifications
(T
A
= -40°C to +85°C, VCC = +2.7V to +5.5V, unless otherwise specified.)
Notes:
(1)
This parameter is not 100% tested.
Cb = total capacitance of one bus line in pF.
(2)
TIMING DIAGRAMS
Bus Timing
Symbol
Parameter
Min.
Max.
400
Units
kHz
ns
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
ns
μ
s
μ
s
ns
ns
ns
pF
f
SCL
t
IN
t
AA
t
BUF
t
LOW
t
HIGH
t
SU:STA
t
HD:STA
t
SU:DAT
t
HD:DAT
t
SU:STO
t
DH
t
R
t
F
Cb
SCL Clock Frequency
Pulse width Suppression Time at inputs
SCL LOW to SDA Data Out Valid
Time the bus must be free before a new transmission can start
Clock LOW Time
Clock HIGH Time
Start Condition Setup Time
Start Condition Hold Time
Data In Setup Time
Data In Hold Time
Stop Condition Setup Time
Data Output Hold Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Capacitive load for each bus line
50
(1)
0.1
1.3
1.3
0.6
0.6
0.6
100
0
0.6
50
0.9
20 +.1Cb
(2)
20 +.1Cb
(2)
300
300
400
t
SU:STO
t
DH
t
HIGH
t
SU:STA
t
HD:STA
t
HD:DAT
t
SU:DAT
SCL
SDA IN
SDA
OUT
t
F
t
LOW
t
BUF
t
AA
t
R
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參數(shù)描述 |
|---|---|
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