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參數(shù)資料
| 型號： | X1228V14Z-4.5A |
| 廠商： | INTERSIL CORP |
| 元件分類： | XO, clock |
| 英文描述： | 16 Characters x 1 Lines, 5x7 Dot Matrix Character and Cursor |
| 中文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO14 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MO-153AC, TSSOP-14 |
| 文件頁數(shù)： | 7/31頁 |
| 文件大?。?/td> | 569K |
| 代理商： | X1228V14Z-4.5A |
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X1228
REV 1.3 3/24/04
Characteristics subject to change without notice.
7 of 31
www.xicor.com
Write Cycle Timing
Power Up Timing
Notes:
(1)
Delays are measured from the time V
CC
is stable until the specified operation can be initiated. These parameters are not 100%
tested. V
CC
slew rate should be between 0.2mV/μsec and 50mV/μsec.
Typical values are for T
A
= 25°C and V
CC
= 5.0V
(2)
Nonvolatile Write Cycle Timing
Note:
(1) t
WC
is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle.
It is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
WATCHDOG TIMER/LOW VOLTAGE RESET OPERATING CHARACTERISTICS
Watchdog/Low Voltage Reset Parameters (SeeFigures 3 and 4)
Symbol
t
PUR
(1)
t
PUW
(1)
Parameter
Min.
Typ.
(2)
Max.
1
5
Units
ms
ms
Time from Power Up to Read
Time from Power Up to Write
Symbol
t
WC
(1)
Parameter
Min.
Typ.
(1)
5
Max.
10
Units
ms
Write Cycle Time
Symbols
Parameters
Min.
Typ.
Max.
Unit
V
PTRIP
Programmed Reset Trip Voltage
X1228-4.5A
X1228
X1228-2.7A
X1228-2.7
4.50
4.25
2.75
2.55
4.63
4.38
2.85
2.65
4.75
4.50
2.95
2.75
V
t
RPD
V
CC
Detect to RESET LOW
Power Up Reset Time-out Delay
500
ns
t
PURST
100
250
400
ms
t
F
t
R
V
CC
Fall Time
V
CC
Rise Time
Watchdog Timer Period (Crystal=32.768kHz):
WD1=0, WD0=0
WD1=0, WD0=1
WD1=1, WD0=0
10
μs
10
μs
t
WDO
1.7
725
225
1.75
750
250
1.8
775
275
s
ms
ms
t
RST
t
RSP
V
RVALID
Watchdog Reset Time-out Delay (Crystal=32.768kHz)
225
250
275
ms
2-Wire interface
1
μs
Reset Valid V
CC
1.0
V
SCL
SDA
t
WC
8th Bit of Last Byte
ACK
Stop
Condition
Start
Condition
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PDF描述 |
|---|---|
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