參數(shù)資料
型號(hào)： X1243S8
廠商： INTERSIL CORP
元件分類(lèi)： XO, clock
英文描述： Real Time Clock/Calendar/Alarm with EEPROM
中文描述： 1 TIMER(S), REAL TIME CLOCK, PDSO8
封裝： PLASTIC, SOIC-8
文件頁(yè)數(shù)： 11/18頁(yè)
文件大?。?/td> 90K
代理商： X1243S8
X1243
11
Figure 10. Current Address Read Sequence
S
t
a
r
t
S
t
o
p
Slave
Address
Data
A
C
K
SDA Bus
Signals from
the Slave
Signals from
the Master
1
1
1
1
1
Random Read
Random read operation allows the master to access
any memory location in the array. Prior to issuing the
Slave Address Byte with the R/W bit set to one, the
master must first perform a “dummy” write operation.
The master issues the start condition and the Slave
Address Byte, receives an acknowledge, then issues
the Word Address Bytes. After acknowledging receipts
of the Word Address Bytes, the master immediately
issues another start condition and the Slave Address
Byte with the R/W bit set to one. This is followed by an
acknowledge from the device and then by the eight bit
word. The master terminates the read operation by not
responding with an acknowledge and then issuing a
stop condition. Refer to Figure 11 for the address,
acknowledge, and data transfer sequence.
In a similar operation, called “Set Current Address,”
the device sets the address if a stop is issued instead of
the second start shown in Figure 11. The X1243 then
goes into standby mode after the stop and all bus activity
will be ignored until a start is detected. This operation
loads the new address into the address counter. The next
Current Address Read operation will read from the
newly loaded address. This operation could be useful
if the master knows the next address it needs to read,
but is not ready for the data.
Sequential Read
Sequential reads can be initiated as either a current
address read or random address read. The first Data
Byte is transmitted as with the other modes; however,
the master now responds with an acknowledge, indicat-
ing it requires additional data. The device continues to
output data for each acknowledge received. The master
terminates the read operation by not responding with
an acknowledge and then issuing a stop condition.
The data output is sequential, with the data from address
n followed by the data from address n + 1. The address
counter for read operations increments through all page
and column addresses, allowing the entire memory
contents to be serially read during one operation. At
the end of the address space the counter “rolls over” to
the start of the address space and the device continues
to output data for each acknowledge received. Refer
to Figure 12 for the acknowledge and data transfer
sequence.
Figure 11. Random Address Read Sequence
0
Slave
Address
Word
Address 1
A
C
K
A
C
K
S
t
a
r
t
S
t
o
p
Slave
Address
Data
A
C
K
S
t
a
r
t
SDA Bus
Signals from
the Slave
Signals from
the Master
A
C
K
Word
Address 0
1
1
1
1
0 0 000
1
1 1 1 1
相關(guān)PDF資料
PDF描述
X1243S8I Real Time Clock/Calendar/Alarm with EEPROM
X1243V8 Real Time Clock/Calendar/Alarm with EEPROM
X125-55FA 30V Single N-Channel HEXFET Power MOSFET in a TO-220AB package; Similar to the IRF3703 with Lead-Free Packaging.
X125-56FA 30V Single N-Channel HEXFET Power MOSFET in a TO-262 package; Similar to IRF3708L with Lead Free Packaging
X125-57FA BEACON STATIC 12VDC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
X1243S8I 制造商:Intersil Corporation 功能描述: 制造商:XICOR 功能描述:
X1243V8 制造商:XICOR 制造商全稱(chēng):Xicor Inc. 功能描述:Real Time Clock/Calendar/Alarm with EEPROM
X-1244 制造商:Pulse 功能描述:TRANSFORMERS - Rail/Tube
X124K 制造商:IQD Frequency Products 功能描述:CRYSTAL OSCILLATOR 8.192000MHZ
X124LE0 制造商:SENSORTECHNICS 制造商全稱(chēng):Sensortechnics GmbH 功能描述:8 mm switching soleniod valves
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*