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| 型號： | X1286V14IT1 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 16/25頁 |
| 文件大小： | 0K |
| 描述： | IC RTC/CAL/CPU SUP EE 14-TSSOP |
| 標準包裝： | 2,500 |
| 類型： | 時鐘/日歷 |
| 特點： | 警報器，閏年，監(jiān)控器，監(jiān)視計時器 |
| 時間格式： | HH:MM:SS:hh（12/24 小時） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 電壓 - 電源，電池： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 14-TSSOP |
| 包裝： | 帶卷 (TR) |
23
FN8101.1
April 14, 2006
Referring to Figure 16, Vtrip applies to the “Internal
Vcc” node which powers the entire device. This means
that if Vcc is powered down and the battery voltage at
Vback is higher than the Vtrip voltage, then the entire
chip will be running from the battery. If Vback falls to
lower than Vtrip, then the chip shuts down and all out-
puts are disabled except for the oscillator and time-
keeping circuitry. The fact that the chip can be
powered from Vback is not necessarily an issue since
standby current for the RTC devices is <2A for this
mode (called “main timekeeping current” in the data
sheet). Only when the serial interface is active is there
an increase in supply current, and with Vcc powered
down, the serial interface will most likely be inactive.
One way to prevent operation in battery backup mode
above the Vtrip level is to add a diode drop (silicon
diode preferred) to the battery to insure it is below
Vtrip. This will also provide reverse leakage protection
which may be needed to get safety agency approval.
One mode that should always be avoided is the opera-
tion of the RTC device with Vback greater than both Vcc
and Vtrip (Condition 2d in Table 9). This will cause the
battery to drain quickly as serial bus communication and
non-volatile writes will require higher supplier current.
PERFORMANCE DATA
IBACK Performance
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
IBACK vs. Temperature
Multi-Lot Process Variation Data
Temperature °C
-40
25
60
85
I BACK
(A)
3.3V
1.8V
X1286
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