參數資料
型號: X3100
英文描述: Reed Relay; Contacts:SPST; Switching Current Max:0.5A; Switching Voltage Max:200V; Contact Carry Current:1A; Coil Voltage DC Max:5V; Relay Terminals:DIP-14; Relay Mounting:PC Board; Contact Carrying Power:10W
中文描述: 3或4芯鋰離子電池保護和監(jiān)控器IC
文件頁數: 17/40頁
文件大小: 249K
代理商: X3100
X3100/X3101 – Preliminary Information
Characteristics subject to change without notice.
17 of 40
REV 1.1.8 12/10/02
www.xicor.com
(2,3)
While device is in sleep (in over-discharge protection) mode:
—The power to ALL internal circuits is switched OFF limiting power consumption to less than 1μA.
—The output of the 5VDC voltage regulator (RGO) is 0V.
—Access to the X3100/X3101 via the SPI port is NOT possible.
Return from sleep mode (but still in over-discharge protection mode):
—Vcc rises above the “Return from Sleep mode threshold Voltage” (V
SLR
)—This would normally occur in the
case that the battery pack was connected to a charger. The X3100/X3101 is now powered via P+/P-, and
not the battery pack cells.
—Power is returned to ALL internal circuitry
—5VDC output is returned to the regulator output (RGO).
—Access is enabled to the X3100/X3101 via the SPI port.
—The status of the discharge FET remains OFF (It is possible to change the status of UVPC in the control reg-
ister, although it will have no effect at this time).
[3]
(3,4)
If the cell charge enable func-
tion is switched ON
AND V
CELL
> V
CE
OR
Charge enable function is
switched OFF
—The X3100/X3101 initiates a reset operation that takes the longer of
T
OV
+200ms or T
UV
+200ms to complete. Do not write to the FET control bits
during this time.
—The charge FET is switched On (OVP/LMON=Vss) by the microcontroller by
writing a “1” to the OVPC bit in the control register.
—The battery cells now receive charge via the charge FET and diode D1 across
the discharge FET (which is OFF).
—The X3100/X3101 monitors the V
CELL
voltage to determine whether or not it
has risen above V
UVR
.
—Charge/discharge of the battery cells via P+ is no longer permitted (Charge
FET and discharge FET are held OFF).
—(Charging may re-commence only when the Cell Charge Enable function is
switched OFF - See Sections: “Configuration Register” page 4, and “Sleep
mode” page 17.)
If the cell charge enable func-
tion is switched ON
AND
V
CELL
< V
CE
[4]
—The voltage of all of the battery cells (V
CELL
), have risen above V
UVR
.
—The internal Over-discharge release timer begins counting down.
—The X3100/X3101 is still in over-discharge protection mode.
(4,5)
—The internal over-discharge release timer continues counting for t
UVR
seconds.
—The X3100/X3101 should be in monitor mode (AS2:AS0 not all low) for recovery time based on t
UVR
. Other-
wise recovery is based on two successive samples about 120ms apart.
[5]
—The internal over-discharge release timer times out, AND V
CELL
is still above V
UVR.
—The device returns from over-discharge protection mode, and is now in normal operation mode.
—The Charger voltage can now drop below VSLR and the X3100/X3101 will not go back to sleep.
—The discharge FET is can now be switched ON (UVP/OCP=V
SS
) by the microcontroller by writing a “1” to
the UVPC bit of the control register.
—The status of the charge FET remains unaffected (ON)
—The battery cells continue to receive charge via the charge FET and discharge FET (both ON).
Table 22. Over-discharge Protection Mode—Event Diagram Description (Continued)
Event
Event Description
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