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參數(shù)資料
| 型號： | X9520B20IA |
| 廠商： | Intersil Corporation |
| 英文描述： | Triple DCP, POR,2kbit EEPROM Memory, Dual Voltage Monitors |
| 中文描述： | 三氯酚，葡萄牙，2kbit EEPROM存儲器，雙電壓監(jiān)視器 |
| 文件頁數(shù)： | 17/33頁 |
| 文件大?。?/td> | 561K |
| 代理商： | X9520B20IA |
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17
FN8206.0
March 8, 2005
V2 Monitoring
The X9520 asserts the V2RO output HIGH if the volt-
age V2 exceeds the corresponding V
TRIP2
threshold
(See Figure 21). The bit V2OS in the CONSTAT regis-
ter is then set to a “0” (assuming that it has been set to
“1” after system initilization).
The V2RO output may remain active HIGH with V
CC
down to 1V.
V3 Monitoring
The X9520 asserts the V3RO output HIGH if the volt-
age V3 exceeds the corresponding V
TRIP3
threshold
(See Figure 21). The bit V3OS in the CONSTAT regis-
ter is then set to a “0” (assuming that it has been set to
“1” after system initilization).
The V3RO output may remain active HIGH with V
CC
down to 1V.
V
TRIPX
THRESHOLDS (X=1,2,3)
The X9520 is shipped with pre-programmed threshold
(V
TRIPx
) voltages. In applications where the required
thresholds are different from the default values, or if a
higher precision / tolerance is required, the X9520 trip
points may be adjusted by the user, using the steps
detailed below.
Setting a V
TRIPx
Voltage (x=1,2,3)
There are two procedures used to set the threshold
voltages (V
TRIPx
), depending if the threshold voltage
to be stored is higher or lower than the present value.
For example, if the present V
TRIPx
is 2.9 V and the
new V
TRIPx
is 3.2 V, the new voltage can be stored
directly into the V
TRIPx
cell. If however, the new set-
ting is to be lower than the present setting, then it is
necessary to “reset” the V
TRIPx
voltage before setting
the new value.
Setting a Higher V
TRIPx
Voltage (x=1,2,3)
To set a V
TRIPx
threshold to a new voltage which is
higher than the present threshold, the user must apply
the desired V
TRIPx
threshold voltage to the corre-
sponding input pin (V1 / Vcc, V2 or V3). Then, a pro-
gramming voltage (Vp) must be applied to the WP pin
before a START condition is set up on SDA. Next, issue
on the SDA pin the Slave Address A0h, followed by
the Byte Address 01h for V
TRIP1
, 09h for V
TRIP2
, and
0Dh for V
TRIP3
, and a 00h Data Byte in order to pro-
gram V
TRIPx
. The STOP bit following a valid write
operation initiates the programming sequence. Pin WP
must then be brought LOW to complete the operation
0 1 2 3 4 5 6 7
SCL
SDA
A0h
0 1 2 3 4 5 6 7
WP
V
P
0 1 2 3 4 5 6 7
V
TRIPx
V2, V3
01h
sets
V
TRIP1
09h
sets
V
TRIP2
0Dh
sets
V
TRIP3
Figure 22. Setting V
TRIPx
to a higher level (x=1,2,3).
Data Byte
V1 / Vcc
00h
S
T
A
R
T
All others Reserved.
Figure 21. Voltage Monitor Response
Vx
VxRO
0V
0V
V
TRIPx
(x = 2,3)
0 Volts
V
TRIP1
V1 / Vcc
X9520
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參數(shù)描述 |
|---|---|
| X9520B20I-A | 功能描述:IC LASR CTRLR 3CHAN 5.5V 20TSSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 激光驅(qū)動器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:60 系列:- 類型:激光二極管驅(qū)動器 數(shù)據(jù)速率:- 通道數(shù):4 電源電壓:3.3V 電流 - 電源:- 電流 - 調(diào)制:- 電流 - 偏置:- 工作溫度:0°C ~ 70°C 封裝/外殼:40-TQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN EP 包裝:托盤 安裝類型:表面貼裝 |
| X9520B20I-AT1 | 功能描述:IC LASR CTRLR 3CHAN 5.5V 20TSSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 激光驅(qū)動器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:60 系列:- 類型:激光二極管驅(qū)動器 數(shù)據(jù)速率:- 通道數(shù):4 電源電壓:3.3V 電流 - 電源:- 電流 - 調(diào)制:- 電流 - 偏置:- 工作溫度:0°C ~ 70°C 封裝/外殼:40-TQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN EP 包裝:托盤 安裝類型:表面貼裝 |
| X9520B20IB | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple DCP, POR,2kbit EEPROM Memory, Dual Voltage Monitors |
| X9520B20I-B | 制造商:Intersil Corporation 功能描述:TRIPLE DCP POR EEPROM MEMORY 20CSP - Rail/Tube |
| X9520B20I-BT1 | 功能描述:IC LASR CTRLR 3CHAN 5.5V 20TSSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 激光驅(qū)動器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:60 系列:- 類型:激光二極管驅(qū)動器 數(shù)據(jù)速率:- 通道數(shù):4 電源電壓:3.3V 電流 - 電源:- 電流 - 調(diào)制:- 電流 - 偏置:- 工作溫度:0°C ~ 70°C 封裝/外殼:40-TQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN EP 包裝:托盤 安裝類型:表面貼裝 |
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