參數(shù)資料
型號(hào): X9520B20IA
廠商: Intersil Corporation
英文描述: Triple DCP, POR,2kbit EEPROM Memory, Dual Voltage Monitors
中文描述: 三氯酚,葡萄牙,2kbit EEPROM存儲(chǔ)器,雙電壓監(jiān)視器
文件頁(yè)數(shù): 6/33頁(yè)
文件大?。?/td> 561K
代理商: X9520B20IA
6
FN8206.0
March 8, 2005
Nonvolatile Write Acknowledge Polling
After a nonvolatile write command sequence (for either
the EEPROM array, the Non Volatile Memory of a DCP
(NVM), or the CONSTAT Register) has been correctly
issued (including the final STOP condition), the X9520
initiates an internal high voltage write cycle. This cycle
typically requires 5 ms. During this time, no further Read
or Write commands can be issued to the device. Write
Acknowledge Polling is used to determine when this high
voltage write cycle has been completed.
To perform acknowledge polling, the master issues a
START condition followed by a Slave Address Byte. The
Slave Address issued must contain a valid Internal
Device Address. The LSB of the Slave Address (R/W)
can be set to either 1 or 0 in this case. If the device is still
busy with the high voltage cycle then no ACKNOWL-
EDGE will be returned. If the device has completed the
write operation, an ACKNOWLEDGE will be returned
and the host can then proceed with a read or write opera-
tion (Refer to Figure 5.).
DIGITALLY CONTROLLED POTENTIOMETERS
DCP Functionality
The X9520 includes three independent resistor arrays.
These arrays respectively contain 63, 99 and 255
discrete resistive segments that are connected in series.
The physical ends of each array are equivalent to the
fixed terminals of a mechanical potentiometer (R
Hx
and
R
Lx
inputs - where x = 0,1,2).
At both ends of each array and between each resistor
segment there is a CMOS switch connected to the wiper
(R
w
x
) output. Within each individual array, only one
switch may be turned on at any one time. These
switches are controlled by the Wiper Counter Register
(WCR) (See Figure 6). The WCR is a volatile register.
On power-up of the X9520, wiper position data is auto-
matically loaded into the WCR from its associated Non
Volatile Memory (NVM) Register. The Table below
shows the Initial Values of the DCP WCR’s before the
contents of the NVM is loaded into the WCR.
ACK
returned
Issue Slave Address
Byte (Read or Write)
Byte load completed
by issuing STOP.
Enter ACK Polling
Issue STOP
Issue START
NO
YES
High Voltage Cycle
complete. Continue
command sequence
Issue STOP
NO
Continue normal
Read or Write
command sequence
PROCEED
YES
Figure 5.
Acknowledge Polling Sequence
DECODER
RESISTOR
ARRAY
R
Hx
FET
SWITCHES
R
Lx
R
Wx
0
1
2
N
WIPER
COUNTER
REGISTER
(WCR)
NON
MEMORY
(NVM)
VOLATILE
“WIPER”
Figure 6.
DCP Internal Structure
DCP
Initial Values Before Recall
V
H
/ TAP = 63
V
L
/ TAP = 0
V
H
/ TAP = 255
R
0
/ 64 TAP
R
1
/ 100 TAP
R
2
/ 256 TAP
X9520
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