參數(shù)資料
型號(hào): XA3S1600E-4FGG484I
廠商: Xilinx Inc
文件頁數(shù): 5/37頁
文件大?。?/td> 0K
描述: IC FPGA SPARTAN-3E 1600K 484FBGA
標(biāo)準(zhǔn)包裝: 60
系列: Spartan®-3E XA
LAB/CLB數(shù): 3688
邏輯元件/單元數(shù): 33192
RAM 位總計(jì): 663552
輸入/輸出數(shù): 376
門數(shù): 1600000
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 484-BBGA
供應(yīng)商設(shè)備封裝: 484-FBGA
DS635 (v2.0) September 9, 2009
Product Specification
13
R
Differential I/O Standards
Table 11: Recommended Operating Conditions for User I/Os Using Differential Signal Standards
IOSTANDARD
Attribute
VCCO for Drivers(1)
VID
VICM
Min (V)
Nom (V)
Max (V)
Min
(mV)
Nom
(mV)
Max
(mV)
Min (V)
Nom (V)
Max (V)
LVDS_25
2.375
2.50
2.625
100
350
600
0.30
1.25
2.20
BLVDS_25
2.375
2.50
2.625
100
350
600
0.30
1.25
2.20
MINI_LVDS_25
2.375
2.50
2.625
200
-
600
0.30
-
2.2
LVPECL_25(2)
Inputs Only
100
800
1000
0.5
1.2
2.0
RSDS_25
2.375
2.50
2.625
100
200
-
0.3
1.20
1.4
DIFF_HSTL_I_18
1.7
1.8
1.9
100
-
0.8
-
1.1
DIFF_HSTL_III_18
1.7
1.8
1.9
100
-
0.8
-
1.1
DIFF_SSTL18_I
1.7
1.8
1.9
100
-
0.7
-
1.1
DIFF_SSTL2_I
2.3
2.5
2.7
100
-
1.0
-
1.5
Notes:
1.
The VCCO rails supply only differential output drivers, not input circuits.
2.
VREF inputs are not used for any of the differential I/O standards.
Table 12: DC Characteristics of User I/Os Using Differential Signal Standards
IOSTANDARD
Attribute
VOD
ΔVOD
VOCM
ΔVOCM
VOH
VOL
Min
(mV)
Typ
(mV)
Max
(mV)
Min
(mV)
Max
(mV)
Min
(V)
Typ
(V)
Max
(V)
Min
(mV)
Max
(mV)
Min
(V)
Max
(V)
LVDS_25
250
350
450
–1.125
–1.375
BLVDS_25
250
350
450
–1.20
MINI_LVDS_25
300
600
–50
1.0
–1.4
–50
RSDS_25
100
400
–1.1
–1.4
––
DIFF_HSTL_I_18
–VCCO – 0.4
0.4
DIFF_HSTL_III_18
–VCCO – 0.4
0.4
DIFF_SSTL18_I
VTT + 0.475
VTT – 0.475
DIFF_SSTL2_I
–VTT + 0.61 VTT – 0.61
Notes:
1.
The numbers in this table are based on the conditions set forth in Table 6, and Table 11.
2.
Output voltage measurements for all differential standards are made with a termination resistor (RT) of 100Ω across the N and P pins of the
differential signal pair. The exception is for BLVDS, shown in Figure 5 below.
3.
At any given time, no more than two of the following differential output standards may be assigned to an I/O bank: LVDS_25, RSDS_25,
MINI_LVDS_25
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