參數(shù)資料
型號(hào): XC2S600E-6FGG456C
廠商: Xilinx Inc
文件頁(yè)數(shù): 102/108頁(yè)
文件大?。?/td> 0K
描述: IC SPARTAN-IIE FPGA 600K 456FBGA
產(chǎn)品變化通告: FPGA Family Discontinuation 18/Apr/2011
標(biāo)準(zhǔn)包裝: 60
系列: Spartan®-IIE
LAB/CLB數(shù): 3456
邏輯元件/單元數(shù): 15552
RAM 位總計(jì): 294912
輸入/輸出數(shù): 329
門數(shù): 600000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 456-BBGA
供應(yīng)商設(shè)備封裝: 456-FBGA
其它名稱: 122-1332
DS077-4 (v3.0) August 9, 2013
93
Product Specification
Spartan-IIE FPGA Family: Pinout Tables
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
I/O, L164N
6
W2
XC2S600E
I/O, L164N
I/O, VREF Bank 6,
L164N_Y
I/O, L163P
6
W5
XC2S400E
-
I/O, L163P_Y
I/O, L163P
I/O, L163N
6
W6
XC2S400E
-
I/O, L163N_Y
I/O, L163N
I/O
6
W7
-
I/O
I/O, L162P_YY
6
Y1
All
-
I/O, L162P_YY
I/O, L162N_YY
6
Y2
All
-
I/O, L162N_YY
I/O
6
Y3
-
I/O
I/O, L161P_YY
6
Y4
All
-
I/O, L161P_YY
I/O, VREF Bank 6,
L161N_YY
6
Y5
All
I/O, VREF Bank 6,
L161N_YY
I/O, VREF Bank 6,
L161N_YY
I/O
6
Y6
-
I/O
I/O, L160P_YY
6
AA1
All
-
I/O, L160P_YY
I/O, L160N_YY
6
AA2
All
-
I/O, L160N_YY
I/O, L159P
6
AA3
XC2S600E
-
I/O, L159P
I/O, L159P_Y
I/O, L159N
6
AA4
XC2S600E
-
I/O, L159N
I/O, L159N_Y
I/O
6
Y7
-
I/O
I/O, L158P
6
AA5
XC2S600E
-
I/O, L158P
I/O, L158P_Y
I/O, VREF Bank 6,
L158N
6
AB5
XC2S600E
All
I/O, VREF Bank 6,
L158N
I/O, VREF Bank 6,
L158N_Y
I/O, L157P
6
AB1
XC2S400E
-
I/O, L157P_Y
I/O, L157P
I/O, L157N
6
AB2
XC2S400E
-
I/O, L157N_Y
I/O, L157N
I/O, L156P
6
AC1
XC2S600E
-
I/O, L156P_Y
I/O, L156N
6
AC2
XC2S600E
-
I/O
I/O, L156N_Y
I/O, L155P_YY
6
AC3
All
-
I/O, L155P_YY
I/O, L155N_YY
6
AB4
All
-
I/O, L155N_YY
I/O, L154P
6
AD1
-
I/O, L154P
I/O, L154N
6
AD2
-
I/O, L154N
I/O, L153P_YY
6
AE1
All
-
I/O, L153P_YY
I/O, L153N_YY
6
AF2
All
-
I/O, L153N_YY
M1
-
AE3
-
M1
M0
-
AF3
-
M0
M2
-
AD4
-
M2
FG676 Pinouts (XC2S400E, XC2S600E) (Continued)
Pad Name
Pin
LVDS Async.
Output Option
VREF
Option
Device-Specific Pinouts
Function
Bank
XC2S400E
XC2S600E
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