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參數(shù)資料
| 型號： | XR16C864IQ-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 45/51頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART FIFO 128B QUAD 100QFP |
| 標準包裝： | 66 |
| 特點： | * |
| 通道數(shù)： | 4，QUART |
| FIFO's： | 128 字節(jié) |
| 規(guī)程： | RS232，RS485 |
| 電源電壓： | 2.97 V ~ 5.5 V |
| 帶自動流量控制功能： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-BQFP |
| 供應商設備封裝： | 100-QFP（14x20） |
| 包裝： | 托盤 |
| 其它名稱： | 1016-1277 |
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XR16C864
5
REV. 2.2.0
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
FSRS#
76
I
FIFO Status Register Select (active low input with internal pull-up).
The content of the FSTAT register is placed on the data bus when this pin becomes
active. However it should be noted, D0-D3 contain the inverted logic states of TXRDY#
A-D pins, and D4-D7 the logic states (un-inverted) of RXRDY# A-D pins. Address line is
not required when reading this status register.
DIRECT MEMORY ACCESS INTERFACE
TC
54
I
Direct Memory Access Terminal Count. A high pulse terminates a Direct Memory Access
transaction. If Direct Memory Access is not used, this input should be connected to GND.
AEN
27
I
Address Enable for Direct Memory Access. A high at this input indicates a valid Direct
Memory Access cycle. See DACK pin descriptions below for Direct Memory Access cycle
description. If Direct Memory Access is not used, this input should be connected to GND.
DACKA
DACKB
DACKC
DACKD
4
26
55
77
I
Direct Memory Access Acknowledge. Direct Memory Access cycle will start processing
when CPU/Host sets this input low and AEN high. All writes will be to the TX FIFO and all
reads will be from the RX FIFO. A0-A2 and CS# A-D will be ignored. If Direct Memory
Access is not used, these inputs should be connected to VCC.
TXDRQA
TXDRQB
TXDRQC
TXDRQD
5
25
56
81
O
Transmit Direct Memory Access Request. A transmit empty request is indicated by a high
level on TXDRQ. The TXDRQ line is held high until either TC pulses or the TX FIFO is
filled above its trigger level. Transmit Direct Memory Access Request is enabled by set-
ting EMSR register bit-2 = 1. If Direct Memory Access is not used, leave these outputs
unconnected.
RXDRQA
RXDRQB
RXDRQC
RXDRQD
100
31
50
82
O
Receive Direct Memory Access Request. A Receive ready request is indicated by a high
level on RXDRQ. The RXDRQ line is held high until either TC pulses or the RX FIFO is
emptied. Receive Direct Memory Access Request is enabled by setting EMSR register
bit-3 = 1. If Direct Memory Access is not used, leave these outputs unconnected.
MODEM OR SERIAL I/O INTERFACE
TXA
TXB
TXC
TXD
14
16
65
67
O
UART channels A-D Transmit Data and infrared transmit data. Standard transmit and
receive interface is enabled when MCR[6] = 0. In this mode, the TX signal will be a logic
1 during reset, or idle (no data). Infrared IrDA transmit and receive interface is enabled
when MCR[6] = 1. In the Infrared mode, the inactive state (no data) for the Infrared
encoder/decoder interface is a logic 0.
IRTXA
IRTXB
IRTXC
IRTXD
6
24
57
75
O
UART channels A-D Infrared Transmit Data. The inactive state (no data) for the Infrared
encoder/decoder interface is a logic 0. Regardless of the logic state of MCR bit-6, this pin
will be operating in the Infrared mode.
RXA
RXB
RXC
RXD
97
34
47
85
I
UART channels A-D Receive Data or infrared receive data. Normal receive data input
must idle at logic 1 condition. The infrared receiver pulses typically idles at logic 0 but can
be inverted by software control prior going in to the decoder, see FCTR[2].
RTSA#
RTSB#
RTSC#
RTSD#
11
19
62
70
O
UART channels A-D Request-to-Send (active low) or general purpose output. This output
must be asserted prior to using auto RTS flow control, see EFR[6], MCR[1], FCTR[1:0],
EMSR[5:4] and IER[6]. Also see
Figure 10. If these outputs are not used, leave them
unconnected.
Pin Description
NAME
100-QFP
PIN #
TYPE
DESCRIPTION
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XR16C864IQTR-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16C872 | 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL UART WITH 1284 PARALLEL PORT AND PLUG-AND-PLAY CONTROLLER |
| XR16C872CQ | 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL UART WITH 1284 PARALLEL PORT AND PLUG-AND-PLAY CONTROLLER |
| XR16C872IQ | 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL UART WITH 1284 PARALLEL PORT AND PLUG-AND-PLAY CONTROLLER |
| XR16L2450 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 5.5V DUART |
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