- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1974 > XR16L784IV-F (Exar Corporation)IC UART 8B 3.3V QUAD 64LQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | XR16L784IV-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 3/51頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART 8B 3.3V QUAD 64LQFP |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 特點(diǎn)： | * |
| 通道數(shù)： | 4，QUART |
| FIFO's： | 64 字節(jié) |
| 規(guī)程： | RS485 |
| 電源電壓： | 2.97 V ~ 5.5 V |
| 帶自動(dòng)流量控制功能： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動(dòng)位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應(yīng)商設(shè)備封裝： | 64-LQFP（10x10） |
| 包裝： | 托盤 |
| 其它名稱： | 1016-1282 |
第1頁第2頁當(dāng)前第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁
XR16L784
11
REV. 1.2.3
HIGH PERFORMANCE 2.97V TO 5.5V QUAD UART
2.8.1
Receive Holding Register (RHR) - Read-Only
The Receive Holding Register is an 8-bit register that holds a receive data byte from the Receive Shift
Register. It provides the receive data interface to the host processor. The RHR register is part of the receive
FIFO of 64 bytes by 11-bits wide, the 3 extra bits are for the 3 error tags to be reported in LSR register. When
the FIFO is enabled by FCR bit-0, the RHR contains the first data character received by the FIFO. After the
RHR is read, the next character byte is loaded into the RHR and the errors associated with the current data
byte are immediately updated in the LSR bits 2-4.
NOTE: Table-B selected as Trigger Table for
FIGURE 8. RECEIVER OPERATION IN NON-FIFO MODE
FIGURE 9. RECEIVER OPERATION IN FIFO AND AUTO RTS FLOW CONTROL MODE
Receive Data Shift
Register (RSR)
Receive
Data Byte
and Errors
RHR Interrupt (ISR bit-2)
Receive Data
Holding Register
(RHR)
RXFIFO1
16X or 8X Clock
Receive Data Characters
Data Bit
Validation
Error
Tags in
LSR bits
4:2
Receive Data Shift
Register (RSR)
RXFIFO1
16X or 8X Clock
E
rro
rT
ags
(6
4-s
e
ts)
E
rro
rT
a
g
s
in
LS
R
bit
s
4:2
64 bytes by 11-bit
wide
FIFO
Receive Data Characters
FIFO Trigger=16
Example: - RX FIFO trigger level selected at 16 bytes
(See Note Below)
Data fills to 24
Data falls to 8
Data Bit
Validation
Receive
Data FIFO
Receive
Data
Receive Data
Byte and Errors
RHR Interrupt (ISR bit-2) programmed for
desired FIFO trigger level.
FIFO is Enabled by FCR bit-0=1
RTS# de-asserts when data fills above the flow
control trigger level to suspend remote transmitter.
Enable by EFR bit-6=1, MCR bit-2.
RTS# re-asserts when data falls below the flow
control trigger level to restart remote transmitter.
Enable by EFR bit-6=1, MCR bit-2.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XR16L788IQ-F | IC UART 64B 3.3V OCTAL 100QFP |
| XR16M2550IL32-F | IC UART FIFO 16B 1.8V DUAL 32QFN |
| XR16M2551IL32-F | IC UART FIFO 16B DUAL 32QFN |
| XR16M2650IM48-F | IC UART FIFO 32B DUAL 48TQFP |
| XR16M2651IM48-F | IC UART FIFO 32B DUAL 48TQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR16L784IVTR-F | 功能描述:UART 接口集成電路 PCI BUS QUAD UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16L788 | 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE OCTAL UART |
| XR16L788_05 | 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE 2.97V TO 5.5V OCTAL UART |
| XR16L788_08 | 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE 2.97V TO 5.5V OCTAL UART |
| XR16L788CQ | 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE 2.97V TO 5.5V OCTAL UART |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。