8XMODE [7:0] = 0X00
4XMODE [7:0] = 0X00
Required Divisor (decimal) = (XTAL1 clock frequency / prescaler) / (serial data rate x 16)
8XMODE [7:0] = 0XFF
4XMODE [7:0] = 0X00
Required Divisor (decimal) = (XTAL1 clock frequency / prescaler / (serial data rate x 8)
8XMODE [7:0] = 0X00
4XMODE [7:0] = 0XFF
Required Divisor (decimal) = (XTAL1 clock frequency / prescaler / (serial data rate x 4)
8XMODE [7:0] = 0XFF
4XMODE [7:0] = 0XFF
Reserved.
ROUND( (Required Divisor - TRUNC(Required Divisor) )*16)/16 + TRUNC(Required Divisor), where
DLM = TRUNC(Required Divisor) >> 8
DLL = TRUNC(Required Divisor) & 0xFF
DLD = ROUND( (Required Divisor-TRUNC(Required Divisor) )*16)
XR16M698
10
1.62V TO 3.63V HIGH PERFORMANCE OCTAL UART WITH 32-BYTE FIFO
REV. 1.0.0
The closest divisor that is obtainable in the 698 can be calculated using the following formula:
In the formulas above, please note that:
TRUNC (N) = Integer Part of N. For example, TRUNC (5.6) = 5.
ROUND (N) = N rounded towards the closest integer. For example, ROUND (7.3) = 7 and ROUND (9.9) = 10.
A >> B indicates right shifting the value ’A’ by ’B’ number of bits. For example, 0x78A3 >> 8 = 0x0078.
FIGURE 4. BAUD RATE GENERATOR
XTAL1
XTAL2
Crystal
Osc/
Buffer
MCR Bit-7=0
(default)
MCR Bit-7=1
DLL, DLM and DLD
Registers
Prescaler
Divide by 1
Prescaler
Divide by 4
16X or 8X or 4X
Sampling
Rate Clock
to Transmitter
and Receiver
To Other
Channels
Fractional Baud
Rate Generator
Logic