REV. 1.0.0 2.16 Internal Loopback Each UART channel prov" />
參數(shù)資料
型號: XR16M698IQ-0B-EVB
廠商: Exar Corporation
文件頁數(shù): 15/58頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR M698-B 100QFP
標(biāo)準(zhǔn)包裝: 1
系列: *
XR16M698
22
1.62V TO 3.63V HIGH PERFORMANCE OCTAL UART WITH 32-BYTE FIFO
REV. 1.0.0
2.16
Internal Loopback
Each UART channel provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
shows how the modem port signals are re-configured. Transmit data from the transmit shift register
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX pin is held at HIGH or mark condition while RTS# and DTR# are de-asserted (HIGH),
and CTS#, DSR# CD# and RI# inputs are ignored.
FIGURE 11. INTERNAL LOOP BACK
TX [7:0]
RX [7:0]
M
odem
/
G
ener
al
Pur
pose
Contr
o
l
Log
ic
In
te
rn
al
Bu
sL
in
es
an
d
Co
n
tro
lSig
n
als
RTS# [7:0]
MCR bit-4=1
VCC
Transmit Shift
Register
Receive Shift
Register
CTS# [7:0]
DTR# [7:0]
DSR# [7:0]
RI# [7:0]
CD# [7:0]
OP1#
OP2#
RTS#
CTS#
DTR#
DSR#
RI#
CD#
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