REV. 1.0.3 HIGH PERFORMANCE DUART WITH 16-BYTE FIFO 2.16 Auto Xon/Xoff (Software) Flow Control When software flow co" />
參數(shù)資料
型號: XR16V2552IL-F
廠商: Exar Corporation
文件頁數(shù): 9/46頁
文件大小: 0K
描述: IC UART FIFO 16B DUAL 32QFN
標準包裝: 490
特點: *
通道數(shù): 2,DUART
FIFO's: 16 字節(jié)
規(guī)程: RS232,RS422
電源電壓: 2.25 V ~ 3.6 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調制解調器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應商設備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 托盤
XR16V2552
17
REV. 1.0.3
HIGH PERFORMANCE DUART WITH 16-BYTE FIFO
2.16
Auto Xon/Xoff (Software) Flow Control
When software flow control is enabled (See Table 14), the V2552 compares one or two sequential receive data
characters with the programmed Xon or Xoff-1,2 character value(s). If receive character(s) (RX) match the
programmed values, the V2552 will halt transmission (TX) as soon as the current character has completed
transmission. When a match occurs, the Xoff (if enabled via IER bit-5) flag will be set and the interrupt output
pin will be activated. Following a suspension due to a match of the Xoff character, the V2552 will monitor the
receive data stream for a match to the Xon-1,2 character. If a match is found, the V2552 will resume operation
and clear the flags (ISR bit-4).
Reset initially sets the contents of the Xon/Xoff 8-bit flow control registers to 0x00. Following reset the user can
write any Xon/Xoff value desired for software flow control. Different conditions can be set to detect Xon/Xoff
characters (See Table 14) and suspend/resume transmissions. When double 8-bit Xon/Xoff characters are
selected, the V2552 compares two consecutive receive characters with two software flow control 8-bit values
(Xon1, Xon2, Xoff1, Xoff2) and controls TX transmissions accordingly. Under the above described flow control
mechanisms, flow control characters are not placed (stacked) in the user accessible RX data buffer or FIFO.
In the event that the receive buffer is overfilling and flow control needs to be executed, the V2552 automatically
sends an Xoff message via the serial TX output to the remote modem. The V2552 sends the Xoff-1,2
characters two-character times (= time taken to send two characters at the programmed baud rate) after the
receive FIFO crosses the selected trigger level. To clear this condition, the V2552 will transmit the programmed
Xon-1,2 characters as soon as receive FIFO is less than one trigger level below the selected trigger level.
Table 7 below explains this.
TABLE 7: AUTO XON/XOFF (SOFTWARE) FLOW CONTROL
RX TRIGGER LEVEL
INT PIN ACTIVATION
XOFF CHARACTER(S) SENT
(CHARACTERS IN RX FIFO)
XON CHARACTER(S) SENT
(CHARACTERS IN RX FIFO)
1
1*
0
4
4*
1
8
8*
4
14
14*
8
* After the trigger level is reached, an xoff character is sent after a short span of time (= time required to send 2
characters); for example, after 2.083ms has elapsed for 9600 baud and 10-bit word length setting.
2.17
Special Character Detect
A special character detect feature is provided to detect an 8-bit character when bit-5 is set in the Enhanced
Feature Register (EFR). When this character (Xoff2) is detected, it will be placed in the FIFO along with normal
incoming RX data.
The V2552 compares each incoming receive character with Xoff-2 data. If a match exists, the received data will
be transferred to FIFO and ISR bit-4 will be set to indicate detection of special character. Although the Internal
Register Table shows Xon, Xoff Registers with eight bits of character information, the actual number of bits is
dependent on the programmed word length. Line Control Register (LCR) bits 0-1 defines the number of
character bits, i.e., either 5 bits, 6 bits, 7 bits, or 8 bits. The word length selected by LCR bits 0-1 also
determines the number of bits that will be used for the special character comparison. Bit-0 in the Xon, Xoff
Registers corresponds with the LSB bit for the receive character.
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