參數(shù)資料
型號(hào): XR17D158CV-0A-EVB
廠商: Exar Corporation
文件頁(yè)數(shù): 1/73頁(yè)
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描述: EVAL BOARD FOR XR17D158 144TQFP
標(biāo)準(zhǔn)包裝: 1
系列: *
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
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XR17D158
UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART
AUGUST 2005
REV. 1.2.2
GENERAL DESCRIPTION
The XR17D1581 (D158) is an octal PCI Bus
Universal Asynchronous Receiver and Transmitter
(UART) with support for PCI Bus universal VIO
buffers in the same package and pin-out as the
XR17C158, XR17C154 and XR17D154. The device
is designed to meet the 32-bit PCI Bus and high
bandwidth requirement in communication systems. A
global interrupt source register provides a complete
interrupt status indication for all 8 channels to speed
up interrupt parsing. Each UART has its own 16C550
compatible set of configuration registers, transmit and
receive FIFOs of 64 bytes, fully programmable
transmit and receive FIFO level trigger levels,
transmit and receive FIFO level counters, automatic
RTS/CTS or DTR/DSR hardware flow control with
programmable hysteresis levels, automatic software
(Xon/Xoff)
flow
control,
IrDA
(Infrared
Data
Association)
encoder/decoder,
8
multi-purpose
inputs/outputs and a 16-bit general purpose timer/
counter.
NOTE: 1 Covered by U.S. Patents #5,649,122 and #5,949,787
APPLICATIONS
Universal Form Factor PCI Bus Add-in Card
Remote Access Servers
Network Management
Factory Automation and Process Control
Point-of-Sale Systems
Multi-port RS-232/RS-422/RS-485 Cards
FEATURES
High Performance Octal PCI UART
Universal PCI Bus Buffers - Auto-sense 3.3V or 5V
Operation
32-bit PCI Bus 2.3 Target Signalling Compliance
A Global Interrupt Source Register for all 8 UARTs
Data Transfer in Byte, Word and Double-word
Data Read/Write Burst Operation
Each UART is independently controlled with:
16C550 Compatible 5G Register Set
64-byte Transmit and Receive FIFOs
Transmit and Receive FIFO Level Counters
Programmable TX and RX FIFO Trigger Level
Automatic RTS/CTS or DTR/DSR Flow Control
Automatic Xon/Xoff Software Flow Control
RS485 HDX Control Output with Selectable
Turn-around Delay
Infrared (IrDA 1.0) Data Encoder/Decoder
Programmable Data Rate with Prescaler
Up to 6.25 Mbps Serial Data Rate
Eight Multi-Purpose Inputs/outputs
A General Purpose 16-bit Timer/counter
Sleep Mode with Automatic Wake-up
EEPROM Interface for PCI Configuration
Same Package and Pin-out as the XR17C158,
XR17C154 and XR17D154
FIGURE 1. BLOCK DIAGRAM
TMRCK
Device
Configuration
Registers
XTAL1
XTAL2
Crystal Osc/Buffer
UART Channel 0
TX0, RX0, DTR0#,
DSR0#, RTS0#,
CTS0#, CD0#, RI0#
PCI Local
Bus
Interface
CLK
RST#
AD[31:0]
C/BE[3:0]#
PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
IDSEL
PERR#
SERR#
INTA#
Configuration
Space
Registers
.
MPIO0- MPIO7
Multi-purpose
Inputs/Outputs
TX7, RX7, DTR7#,
DSR7#, RTS7#,
CTS7#, CD7#, RI7#
UART Channel 7
UART Channel 6
UART Channel 5
UART Channel 4
UART Channel 3
UART Channel 2
UART Channel 1
16-bit
Timer/Counter
EECK
EEDI
EEDO
EECS
EEPROM
Interface
64 Byte TX FIFO
64 Byte RX FIFO
BRG
IR
ENDEC
TX & RX
UART
Regs
3.3V or 5V
VIO
5V VCC
(Core Logic)
GND
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