XR17D158
UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART
xr
REV. 1.2.1
6
CD7#
50
I
UART channel 7
Carrier Detect or general purpose input (active low).
RI7#
51
I
UART channel 7 Ring Indicator or general purpose
input (active low).
ANCILLARY SIGNALS
MPIO0
108
I/O
Multi-purpose input/output 0. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT
MPIO1
107
I/O
Multi-purpose input/output 1. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO2
74
I/O
Multi-purpose input/output 2. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO3
73
I/O
Multi-purpose input/output 3. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO4
68
I/O
Multi-purpose input/output 4. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO5
67
I/O
Multi-purpose input/output 5. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO6
66
I/O
Multi-purpose input/output 6. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO7
65
I/O
Multi-purpose input/output 7. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
EECK
116
O
Serial clock to EEPROM.
An internal clock of CLK divide by 256 is used for
reading the vendor and sub-vendor ID during power up or reset. However, it
can be manually clocked thru the Configuration Register REGB.
EECS
115
O
Chip select to a EEPROM device like 93C46. It is manually selectable thru
the Configuration Register REGB. Requires a pull-up 4.7K ohm resistor for
external sensing of EEPROM during power up. See DAN112 for further
details.
EEDI
114
O
Write data to EEPROM device. It is manually accessible thru the Configura-
tion Register REGB.
EEDO
113
I
Read data from EEPROM device. It is manually accessible thru the Configu-
ration Register REGB.
XTAL1
110
I
Crystal or external clock input.
XTAL2
109
O
Crystal or buffered clock output.
TMRCK
69
I
16-bit timer/counter external clock input.
ENIR
70
I
Infrared mode enable (active high). This pin is sampled during power up, fol-
lowing a hardware reset (RST#) or soft-reset (register RESET). It can be
used to start up all 8 UARTs in the infrared mode. The sampled logic state is
transferred to MCR bit-6 in the UART.
TEST#
111
I
Factory Test. Connect to VCC for normal operation.
VCC
64, 90,112
Power supply for the UART core logic - 5V ONLY. This power supply deter-
mines the VOH level of the non-PCI bus interface outputs. See Table 1
for
valid combinations of VCC and VIO that can be used for the XR17D158.
PIN DESCRIPTIONS
N
AME
P
IN
#
T
YPE
D
ESCRIPTION