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參數資料
| 型號： | XR17L152CM |
| 廠商： | EXAR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 3.3V PCI BUS DUAL UART |
| 中文描述： | 2 CHANNEL(S), 3.125M bps, SERIAL COMM CONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1 MM HEIGHT, TQFP-100 |
| 文件頁數： | 12/55頁 |
| 文件大?。?/td> | 318K |
| 代理商： | XR17L152CM |
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DISCONTINUED
XR17L152
3.3V PCI BUS DUAL UART
REV. 1.1.0
12
Registers INT3, INT2 and INT1 [32:8]
Twenty four bit encoded interrupt indicator. Each channel’s interrupt is encoded into 3 bits for receive, transmit,
and status. Bit [10:8] represent channel 0 and channel 1 with bits [13:11]. The 3 bit encoding and their priority
order are shown below in
Table 5
. The Timer and MPIO interrupts are for the device and therefore they exist
within channel 0 only.
.
The INT0 register provides status for each channel
F
IGURE
4. T
HE
G
LOBAL
I
NTERRUPT
R
EGISTER
, INT0, INT1, INT2
AND
INT3
T
ABLE
5: UART C
HANNEL
[1:0] I
NTERRUPT
S
OURCE
E
NCODING
P
RIORITY
B
IT
[
N
+2]
B
IT
[
N
+1]
B
IT
[
N
]
I
NTERRUPT
S
OURCE
(
S
)
x
0
0
0
None
1
0
0
1
RXRDY and RX Line Status (logic OR of LSR[4:1])
2
0
1
0
RXRDY Time-out
3
0
1
1
TXRDY, THR or TSR (auto RS485 mode) empty
4
1
0
0
MSR, RTS/CTS or DTR/DSR delta or Xoff/Xon det. or special char. detected
5
1
0
1
Reserved.
6
1
1
0
MPIO pin(s). Available only in channel 0, reserved in channel 1.
7
1
1
1
TIMER Time-out. Available only in channel 0, reserved channel 1.
INT0 Register
Individual UART Channel Interrupt Status
Rsvd
Rsvd Rsvd Ch-1 Ch-0
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
Rsvd Rsvd Rsvd
Rsvd
Rsvd
Channel-1
Channel-0
INT2 Register
INT1 Register
INT3 Register
INT0 Register
Rsvd
Interrupt Registers,
INT0, INT1, INT2 and INT3
Bit-0
Bit-1
Bit-2
Bit-3
Bit-7
Bit-4
Bit-5
Bit-6
Rsvd
Rsvd Ch-1 Ch-0
Bit
N+1
Bit
N+2
Bit
N
Bit
N+1
Bit
N+2
Bit
N
Bit
N+1
Bit
N+2
Bit
N
Bit
N+1
Bit
N+2
Bit
N
Bit
N+1
Bit
N+2
Bit
N
Bit
N+1
Bit
N+2
Bit
N
Bit
N+1
Bit
N+2
Bit
N
Bit
N+1
Bit
N+2
Bit
N
Rsvd
Rsvd Rsvd
Rsvd
Rsvd
Rsvd
Rsvd
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