REV. 1.0.3 HIGH PERFORMANCE DUAL PCI EXPRESS UART EEDI J8 O Write data to EEPROM device. It is manually accessible thru the Configur" />
參數(shù)資料
型號: XR17V352IB-0A-EVB
廠商: Exar Corporation
文件頁數(shù): 45/64頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR XR17V352 113BGA
產(chǎn)品培訓(xùn)模塊: PCIe UARTs
標準包裝: 1
主要目的: 接口,UART
已用 IC / 零件: XR17V352
已供物品:
其它名稱: 1016-1610
1016-1610-ND
1016-1645
XR17V352IB-0A-EVB-ND
XR17V352
5
REV. 1.0.3
HIGH PERFORMANCE DUAL PCI EXPRESS UART
EEDI
J8
O
Write data to EEPROM device. It is manually accessible thru the Configura-
tion Register REGB.
EEDO
L9
I
Read data from EEPROM device. It is manually accessible thru the Configu-
ration Register REGB.
JTAG SIGNALS
TRST#
L6
I
JTAG Test Reset. This signal is active LOW.
TCK
K6
I
JTAG Test Clock
TMS
J6
I
JTAG Test Mode Select
TDI
L7
I
JTAG Data Input
TDO
K7
O
JTAG Data Output
BUCK REGULATOR SIGNALS
ENABLE
C10
I
Connect to VCC to enable buck regulator. Connect to GND to disable buck
regulator.
LX
A9
A10
O
Connect these two signals together to external 4.7uH inductor.
FB
C7
I
Connect this signal to other end of external 4.7uH inductor. 47uF capacitor to
GND is also required on this pin.
PWRGD
D9
O
Indicates that 1.2V core has been powered up.
ANCILLARY SIGNALS
RESET#
J5
I
System reset (active low). In normal operation, this signal should be HIGH.
TMRCK
A6
I
16-bit timer/counter external clock input.
EN485#
C6
I
Auto RS-485 mode enable (active low). This pin is sampled during power up,
following a hardware reset (RST#) or soft reset (register RESET). It can be
used to start up both UARTs in the Auto RS-485 Half-Duplex Direction control
mode. The sampled logic state is transferred to FCTR bit-5 in the UART
channel.
ENIR#
B6
I
Infrared mode enable (active low). This pin is sampled during power up, fol-
lowing a hardware reset (RST#) or soft-reset (register RESET). It can be
used to start up both UARTs in the infrared mode. The sampled logic state is
transferred to MCR bit-6 in the UART.
TEST0
TEST1
TEST2
TEST3
D2
B7
A7
D10
I
Factory Test Modes. For normal operation, connect to GND.
TEST4#
E10
I
Factory Test Mode 4. For normal operation, connect to VCC.
TEST5
E9
I/O
Factory Test I/O. For normal operation, connect to pull-down resistor.
VCC33
D5, E8, H7
Pwr
3.3V I/O power supply.
VCC33A
H3
Pwr
3.3V analog PHY power supply. A ferrite bead is recommended on this pin.
VCC33P
B9, C9
Pwr
3.3V power supply voltage for output stage of buck regulator.
PIN DESCRIPTIONS
NAME
PIN #TYPE
DESCRIPTION
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