REV. 1.0.3 SINGLE CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER MSR[0]: Delta CTS# Input Flag (Internal Loopback Mode Only)
參數(shù)資料
型號： XR19L400IL40-0B-EB
廠商： Exar Corporation
文件頁數(shù)： 25/46頁
文件大?。?/td> 0K
描述： EVAL BOARD FOR XR19L202 40QFN
標(biāo)準(zhǔn)包裝： 1
系列： *
XR19L400
31
REV. 1.0.3
SINGLE CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER
MSR[0]: Delta CTS# Input Flag (Internal Loopback Mode Only)
Logic 0 = No change on CTS# input (default).
Logic 1 = The CTS# input has changed state since the last time it was monitored. A modem status interrupt
will be generated if MSR interrupt is enabled (IER bit-3).
MSR[1]: Delta DSR# Input Flag (Internal Loopback Mode Only)
Logic 0 = No change on DSR# input (default).
Logic 1 = The DSR# input has changed state since the last time it was monitored. A modem status interrupt
will be generated if MSR interrupt is enabled (IER bit-3).
MSR[2]: Delta RI# Input Flag (Internal Loopback Mode Only)
Logic 0 = No change on RI# input (default).
Logic 1 = The RI# input has changed from a LOW to HIGH, ending of the ringing signal. A modem status
interrupt will be generated if MSR interrupt is enabled (IER bit-3).
MSR[3]: Delta CD# Input Flag (Internal Loopback Mode Only)
Logic 0 = No change on CD# input (default).
Logic 1 = Indicates that the CD# input has changed state since the last time it was monitored. A modem
status interrupt will be generated if MSR interrupt is enabled (IER bit-3).
MSR[4]: CTS Input Status
CTS# is not available as an input pin on the L400, but it is available for use during internal loopback mode.
This bit is equivalent to the RTS# bit in the MCR register.
MSR[5]: DSR Input Status
CTS# is not available as an input pin on the L400, but it is available for use during internal loopback mode.
This bit is equivalent to the DTR# bit in the MCR register.
MSR[6]: RI Input Status
RI# is not available as an input pin on the L400, but it is available for use during internal loopback mode. This
bit is equivalent to bit-2 in the MCR register.
MSR[7]: CD Input Status
CD# is not available as an input pin on the L400, but it is available for use during internal loopback mode. This
bit is equivalent to bit-3 in the MCR register.
4.10
Scratch Pad Register (SPR) - Read/Write
This is a 8-bit general purpose register for the user to store temporary data. The content of this register is
preserved during sleep mode but becomes 0xFF (default) after a reset or a power off-on cycle.
4.11
Enhanced Mode Select Register (EMSR)
This register replaces SPR (during a Write) and is accessible only when FCTR[6] = 1.
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