參數(shù)資料
型號: XRD8799AIQ
廠商: EXAR CORP
元件分類: ADC
英文描述: LOW POWER, 2 MSPS, 10-BIT, A/D CONVERTER WITH 8-CHANNEL MUX
中文描述: 8-CH 10-BIT RESISTANCE LADDER ADC, PARALLEL ACCESS, PQFP44
封裝: 10 X 10 MM, PLASTIC, QFP-44
文件頁數(shù): 13/23頁
文件大?。?/td> 408K
代理商: XRD8799AIQ
XRD8799
LOW POWER, 2 MSPS, 10-BIT, A/D CONVERTER WITH 8-CHANNEL MUX
REV. 1.00
xr
13
1.6
The logic encodes the outputs of the comparators in-
to a binary code and latches the data in a D-type flip-
flop for output.
The functional equivalent of the XRD8799 (Figure 14)
is composed of:
1. Delay stage (t
AP
) from the clock to the sampling
phase (f
S
).
2. An ideal analog switch which samples V
IN
.
3. An ideal A/D which tracks and converts V
IN
with
no delay.
4. A series of two DFF's with specified hold (t
HLD
)
and delay (t
DL
) times.
t
AP
, t
HL
D and t
DL
are specified in the Electrical Charac-
teristics table.
1.7
P
OWER
D
OWN
Figure 15 shows the relationship between the clock,
sampled V
IN
to output data relationship and the effect
of power down.
D
IGITAL
I
NTERFACES
F
IGURE
14. XRD8799 F
UNCTIONAL
E
QUIVALENT
C
IR
-
CUIT
AND
I
NTERFACE
T
IMING
F
IGURE
15. P
OWER
D
OWN
T
IMING
D
IAGRAM
φ
VIN
S
A/D
XRD8799
CLK
DB9-DB0
N
N+1
N-1
N
t
DL
t
HLD
D
Q
D
Q
DB9-DB0
CLK
VIN
t
AP
N-2 Valid
DB0-DB9
CLK
VIN
PD
IDD, IVREF(+)
SAMPLE
N
SAMPLE
M
SAMPLE
M+1
N-1 Valid
N Valid
M Valid
t
CLKS1
t
CLKH1
t
PD
t
PU
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