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á THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER XRT72L53
PRELIMINARY
REV. P1.1.7
138
and
Table 12 will be presented in the discussion of
the functional blocks, within the XRT72L53 Framer IC.
These discussions will present more details about the
interrupt causes and how to properly service. them.
2.8
INTERFACING THE FRAMER TO AN INTEL-TYPE
MICROPROCESSOR
The Framer can be interfaced to either Intel-type or
Motorola-type Microprocessor/Microcontrollers. The
following sections will provide one example for each
type of processor. This section discusses how to in-
terface the XRT72L53 DS3/E3 Framer IC to the 8051
Microcontroller.
The 8051 Microcontroller
The 8051 family of microcontrollers is manufactured
by Intel and comes with a variety of amenities. Some
of these amenities include:
On-chip Serial Port
Four (4) 8-bit I/O ports (P0 - P3)
4k bytes of ROM
128 bytes of RAM
The 8051 Microcontroller consists of 4 - 8-bit I/O
Ports. Some of these ports have alternate functions
as will be discussed below.
PORT 0 (P0.0 - P0.7)
This port is a dual-purpose port on pins 32-39 of the
8051 IC. In minimal component designs, it is used as
a general purpose I/O port. For larger designs with
external memory, it becomes a multiplexed address
and data bus (AD0 - AD7).
PORT 1 (P1.0 - P1.7)
Port 1 is a dedicated port on pins 1 - 8. The pins, des-
ignated at P1.0, P1.1, ... P1.7 are available for inter-
facing as required. No alternative functions are as-
signed for Port 1 pins, thus they are used solely for in-
terfacing external devices. Exceptions are the 8032
and 8052 IC’s, which use P1.0 and P1.1 as either as
I/O lines or as external inputs to the third timer.
PORT 2 (P2.0 - P2.7)
Port 2 (pins 21 - 28) is a dual-purpose port that can
function as a general purpose I/O, or as the high-byte
of the address bus for designs with external code
memory of more than 256 bytes of external data
memory (A8 - A15).
PORT 3
Port 3 is a dual purpose port on pins 10 - 17. In addi-
tion to functioning as general purpose I/O, these pins
have multiple functions. Each of these pins have an
alternate purpose, as listed in
Table 13 below.
The 8051 also has numerous additional pins which
are relevant to interfacing to the XRT72L53 DS3/E3
UNI or other peripherals. These pins are:
ALE - Address Latch Enable
If Port 0 is used in its alternative mode -as the data
bus and the lower byte of the address bus -- ALE is
the signal that latches the address into an external
register during the first half of a memory cycle. Once
this is done, Port 0 lines are then available for data in-
put or output during the second half of the memory
cycle, when the data transfer takes place.
INT0* (P3.2) and INT1* (P3.3)
INT0* and INT1* are external interrupt request inputs
to the 8051 Microcontroller. Each of these interrupt
pins support direct interrupt processing. In this case,
the term direct means that if one of these inputs are
asserted, then program control will automatically
branch to a specific (fixed) location in code memory.
This location is determined by the circuit design of the
TABLE 13: ALTERNATE FUNCTIONS OF PORT 3 PINS
BIT
NAME
ALTERNATE FUNCTION
P3.0
RXD
Receive Data for Serial Port
P3.1
TXD
Transmit Data for Serial Port
P3.2
INT0*
External Interrupt 0
P3.3
INT1*
External Interrupt 1
P3.4
T0
Timer/Counter 0 External Input
P3.5
T1
Timer/Counter 1 External Input
P3.6
WR*
External Data/Memory Write Strobe
P3.7
RD*
External Data/Memory Read Strobe