THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER XRT72L53 PRELIMINARY REV" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� XRT72L53IB-F
寤犲晢锛� Exar Corporation
鏂囦欢闋佹暩(sh霉)锛� 80/467闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FRAMER DS3/E3 3CH 272PBGA
鐢�(ch菐n)鍝佽畩鍖栭€氬憡锛� XRT72Lx Series Obsolescence 02/May/2012
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 40
鎺у埗鍣ㄩ鍨嬶細 DS3/E3 瑾�(di脿o)骞€鍣�
闆绘簮闆诲锛� 3.3V
闆绘祦 - 闆绘簮锛� 190mA
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 272-BBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 272-PBGA锛�27x27锛�
鍖呰锛� 鎵樼洡
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THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER XRT72L53
PRELIMINARY
REV. P1.1.7
170
The Performance Monitoring Overhead Bits (P
and CP Bits)
The P-bits are always internally generated by the
Transmit Section of the XRT72L53. The 鈥淧鈥� bits are
used by the Remote Terminal Equipment to perform
error-checking/detection of a DS3 data stream, as it
is transmitted from one Terminal Equipment to adja-
cent Terminal Equipment (e.g., point-to-point check-
ing). Hence, the user cannot insert his/her value for
the P-bits into the outbound DS3 data stream, via the
Transmit Overhead Data Input Interface.
In contrast to 鈥淧鈥� bits, 鈥淐P鈥� bits are used perform er-
ror-checking/detection of a DS3 data stream from the
Source Terminal Equipment to the Sink Terminal
Equipment. In applications where a given DS3 data
stream is received via one port, and is output via an-
other port, it is necessary that the 鈥淐P鈥� bit-values re-
main constant. The only way to insure this to (1) ex-
tract out the 鈥淐P鈥� bit values, via the Receiving Line
Card and (2) insert these CP-bit values into the out-
bound DS3 data stream, via the Transmit Overhead
Data Input Interface block. Hence, the Transmit Over-
head Data Input Interface block will permit the user to
externally insert the 鈥淐P鈥� bits into the outbound DS3
data stream.
The Alarm and signaling related Overhead bits
Bits that are used to transport the alarm conditions
can be either internally generated by the Transmit
Section within the XRT72L53, or can be externally
generated and inserted into the outbound DS3 data
stream, via the Transmit Overhead Data Input Inter-
face. The DS3 frame overhead bits that fall into this
category are:
The X bits
The FEAC bits
The FEBE bits.
The Data Link Related Overhead Bits
The DS3 frame structure also contains bits which can
be used to transport User Data Link information and
Path Maintenance Data Link information. The UDL
(User Data Link) bits are only accessible via the
Transmit Overhead Data Input Interface. The Path
Maintenance Data Link (PMDL) bits can either be
sourced from the Transmit LAPD Controller/Buffer or
via the Transmit Overhead Data Input Interface.
Table 20 lists the Overhead Bits within the DS3
frame. Additionally, this table also indicates whether
or not these overhead bits can be sourced by the
Transmit Overhead Data Input Interface or not.
NOTES:
* The XRT72L53 contains mask register bits that per-
mit the user to alter the state of the internally generat-
ed value for these bits.
+ The Transmit LAPD Controller/Buffer can be config-
ured to be the source of the DL bits, within the out-
bound DS3 data stream.
In all, the Transmit Overhead Data Input Interface
permits the user to insert overhead data into the out-
bound DS3 frames via the following two different
methods.
Method 1 - Using the TxOHClk clock signal
Method 2 - Using the TxInClk and the TxOHEnable
signals.
Each of these methods are described below.
4.2.2.1
4.2.2.1 Method 1 - Using the TxOHClk
Clock Signal
TABLE 20: A LISTING OF THE OVERHEAD BITS WITHIN THE DS3 FRAME, AND THEIR POTENTIAL SOURCES, WITHIN THE
XRT72L53 IC
OVERHEAD BIT
INTERNALLY GENERATED
ACCESSIBLE VIA THE TRANSMIT OVERHEAD
DATA INPUT INTERFACE
BUFFER/REGISTER
ACCESSIBLE
PYes
No
Yes*
X
Yes
FYes
No
Yes*
MYes
No
Yes*
FEAC
No
Yes
FEBE
Yes
DL
No
Yes
Yes+
UDL
No
Yes
No
CP
No
Yes
No
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