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參數(shù)資料
| 型號： | XRT73LC00 |
| 廠商： | Exar Corporation |
| 英文描述： | E3/DS3/STS-1 LINE INTERFACE UNIT |
| 中文描述： | E3/DS3/STS-1線路接口單元 |
| 文件頁數(shù)： | 38/53頁 |
| 文件大?。?/td> | 604K |
| 代理商： | XRT73LC00 |
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XRT73L00
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.2.0
á
35
Declaring ALOS
The XRT73L00 declares an ALOS (Analog LOS) con-
dition whenever the amplitude of the input signal falls
below the Signal Level to Declare ALOS levels speci-
fied in Table 4.
Clearing ALOS
The XRT73L00 clears ALOS whenever the amplitude
of the input signal rises above the Signal Level to
Clear ALOS levels specified in Table 4.
N
OTE
:
There is approximately a 2dB hysteresis in the
received signal level that exists between declaring and
clearing ALOS in order to prevent chattering in the RLOS
output signal.
Monitoring the State of ALOS
If the XRT73L00 is operating in the HOST Mode, the
state of ALOS can be polled or monitored by reading
in the contents of Command Register 0. The bit-for-
mat of Command Register 0 is presented below.
If the ALOS bit-field contains a “1”, the XRT73L00 is
currently declaring an ALOS condition. If the ALOS
bit-field contains a “0”, the device is NOT currently de-
claring an ALOS condition.
Disabling the ALOS Detector
It is useful to disable the ALOS Detector in the
XRT73L00 for debugging purposes. If the XRT73L00
is operating in the HOST Mode, the ALOS Detector
can be disabled by writing a “1” into the ALOSDIS bit-
field in Command Register 2 as depicted below.
N
OTE
:
Setting both the ALOSDIS and DLOSDIS bit-fields
to “1” disables LOS Declaration in the XRT73L00.
2. The Digital LOS (DLOS) Declaration/Clear-
ance Criteria
The XRT73L00 declare a Digital LOS (DLOS) condi-
tion if the XRT73L00 detects 160±32 or more consec-
utive “0’s” in the incoming data.
The XRT73L00 clears DLOS if it detects four consec-
utive sets of 32 bit-periods each of which contains at
least 10 “1’s” (e.g., average pulse density of greater
than 33%).
T
ABLE
4: T
HE
ALOS D
ECLARATION
AND
C
LEARANCE
T
HRESHOLDS
FOR
A
G
IVEN
S
ETTING
OF
LOSTHR (DS3
AND
STS-1 A
PPLICATIONS
)
FOR
E
QUALIZER
E
NABLED
OR
D
ISABLED
A
PPLICATION
LOSTHR S
ETTING
S
IGNAL
L
EVEL
TO
D
ECLARE
ALOS
S
IGNAL
L
EVEL
TO
C
LEAR
ALOS
LOS L
EVEL
W
ITH
E
QUALIZER
E
NABLED
DS3
0
< 55mV
> 220mV
1
< 22mV
> 70mV
Sonet STS-1
0
< 75mV
> 270mV
1
< 25mV
> 110mV
LOS L
EVEL
W
ITH
E
QUALIZER
D
ISABLED
DS3
0
< 35mV
> 155mV
1
< 17mV
> 70mV
Sonet STS-1
0
< 55mV
> 210mV
1
< 20mV
> 90mV
COMMAND REGISTER CR0 (ADDRESS = 0X00)
D4
D3
D2
D1
D0
RLOL
RLOS
ALOS
DLOS
DMO
Read
Only
Read
Only
Read
Only
Read
Only
Read
Only
COMMAND REGISTER CR2 (ADDRESS = 0X02)
D4
D3
D2
D1
D0
Reserved ENDECDIS ALOSDIS DLOSDIS REQDIS
X
X
1
X
X
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT73LC00IV | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73L00 | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73L00A | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73L00AIV | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT75L03DIV | Telecomm/Datacomm |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT73LC00A | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC00A_08 | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC00AES | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT73LC00AIV | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT73LC00AIV-F | 功能描述:外圍驅(qū)動器與原件 - PCI 1-Ch DS3, E3, SONET RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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