參數(shù)資料
型號(hào)： XRT73LC00A
廠商： Exar Corporation
英文描述： E3/DS3/STS-1 LINE INTERFACE UNIT
中文描述： E3/DS3/STS-1線路接口單元
文件頁(yè)數(shù)： 3/53頁(yè)
文件大?。?/td> 376K
代理商： XRT73LC00A
Figure 4. Timing Diagram of the Receive Terminal Output Interface ............................................................. 13
Figure 5. Transmit Pulse Amplitude Test Circuit for DS3, E3 and STS-1 Rates ............................................ 13
AC ELECTRICAL CHARACTERISTICS (CONT’D) L
INE
S
IDE
P
ARAMETERS
........................................... 16
Figure 6. ITU-T G.703 Transmit Output Pulse Template for E3 Applications ................................................. 17
Figure 7. Bellcore GR-499-CORE Transmit Output Pulse Template for DS3 Applications ............................ 17
Figure 8. Bellcore GR-253-CORE Transmit Output Pulse Template for SONET STS-1 Applications ........... 18
Figure 9. Microprocessor Serial Interface Data Structure .............................................................................. 18
AC ELECTRICAL CHARACTERISTICS (CONT.) ................................................................................... 19
Figure 10. Timing Diagram for the Microprocessor Serial Interface ............................................................... 19
SYSTEM DESCRIPTION ................................................................................................... 20
T
HE
T
RANSMIT
S
ECTION
............................................................................................................................ 20
T
HE
R
ECEIVE
S
ECTION
.............................................................................................................................. 20
T
HE
M
ICROPROCESSOR
S
ERIAL
I
NTERFACE
................................................................................................ 20
T
ABLE
1: R
OLE
OF
M
ICROPROCESSOR
S
ERIAL
I
NTERFACE
PINS
WHEN
THE
XRT73LC00A
IS
OPERATING
IN
THE
H
ARD
-
WARE
M
ODE
...................................................................................................................................... 20
1.0 Selecting the Data Rate ............................................................................................. 21
T
ABLE
2: S
ELECTING
THE
D
ATA
R
ATE
FOR
THE
XRT73LC00A
VIA
THE
E3
AND
STS-1/DS3
INPUT
PINS
(H
ARDWARE
M
ODE
) ............................................................................................................................................... 21
C
OMMAND
R
EGISTER
CR4 (A
DDRESS
= 0
X
04) ........................................................................................... 21
T
ABLE
3: S
ELECTING
THE
D
ATA
R
ATE
FOR
THE
XRT73LC00A V
IA
THE
STS-1/DS3
AND
THE
E3 B
IT
-
FIELDS
W
ITHIN
C
OMMAND
R
EGISTER
CR4 (HOST M
ODE
) .......................................................................................... 21
2.0 The Transmit Section ................................................................................................ 22
2.1 T
HE
T
RANSMIT
L
OGIC
B
LOCK
.............................................................................................................. 22
Figure 11. The Typical Interface for the Transmission of Data in a Dual-Rail Format From the Transmitting Ter-
minal Equipment to the Transmit Section of the XRT73LC00A ................................................... 22
Figure 12. How the XRT73LC00A Samples the Data on the TPDATA and TNDATA Input Pins ................... 22
2.1.1 Accepting Single-Rail Data from the Terminal Equipment ................................................. 23
C
OMMAND
R
EGISTER
CR1 (A
DDRESS
= 0
X
01) ........................................................................................... 23
Figure 13. The Behavior of the TPDATA and TCLK Input Signals While the Transmit Logic Block is Accepting
Single-Rail Data From the Terminal Equipment ........................................................................... 23
2.2 T
HE
T
RANSMIT
C
LOCK
D
UTY
C
YCLE
A
DJUST
C
IRCUITRY
...................................................................... 23
2.3 T
HE
HDB3/B3ZS E
NCODER
B
LOCK
.................................................................................................... 24
2.3.1 B3ZS Encoding ....................................................................................................................... 24
Figure 14. An Example of B3ZS Encoding ..................................................................................................... 24
2.3.2 HDB3 Encoding ...................................................................................................................... 24
Figure 15. An Example of HDB3 Encoding .................................................................................................... 24
2.3.3 Enabling/Disabling the HDB3/B3ZS Encoder ...................................................................... 25
2.4 T
HE
T
RANSMIT
P
ULSE
S
HAPER
C
IRCUITRY
........................................................................................... 25
XRT73LC00A
E3/DS3/STS-1 LINE INTERFACE UNIT
PRELIMINARY
REV. P1.0.0
I
TABLE OF CONTENTS
GENERAL DESCRIPTION .................................................................................................. 1
FEATURES ................................................................................................................................................ 1
APPLICATIONS ......................................................................................................................................... 1
Figure 1. Block Diagram of the XRT73LC00A .................................................................................................. 1
ORDERING INFORMATION ............................................................................................... 2
Figure 2. Pin Out of the XRT73LC00A in the 44 Pin TQFP .............................................................................. 2
TABLE OF CONTENTS.........................................................................................................I
PIN DESCRIPTION ............................................................................................................. 3
ELECTRICAL CHARACTERISTICS ................................................................................. 11
ABSOLUTE MAXIMUM RATINGS ................................................................................................... 11
DC E
LECTRICAL
C
HARACTERISTICS
............................................................................................................ 11
AC E
LECTRICAL
C
HARACTERISTICS
............................................................................................................ 12
Figure 3. Timing Diagram of the Transmit Terminal Input Interface ............................................................... 13
相關(guān)PDF資料
PDF描述
XRT73LC00AIV E3/DS3/STS-1 LINE INTERFACE UNIT
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XRT73LC03AIV 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73LC04A 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73LC04AIV 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT73LC00A_08 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73LC00AES 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT73LC00AIV 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT73LC00AIV-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 1-Ch DS3, E3, SONET RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT73LC00AIVTR 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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