參數(shù)資料
型號(hào)： XRT73LC00A
廠商： Exar Corporation
英文描述： E3/DS3/STS-1 LINE INTERFACE UNIT
中文描述： E3/DS3/STS-1線路接口單元
文件頁(yè)數(shù)： 36/53頁(yè)
文件大?。?/td> 376K
代理商： XRT73LC00A
XRT73LC00A
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. P1.0.0
xr
PRELIMINARY
33
Encoder/Decoder, write a “1” into the ENDECDIS bit-
field.
3.6
The XRT73LC00A contains circuitry that monitors the
following two parameters associated with the incom-
ing line signals.
1.
The amplitude of the incoming line signal via the
RTIP and RRING inputs; and
2.
The number of pulses detected in the incoming
line signal within a certain amount of time.
If the XRT73LC00A determines that the incoming line
signal is missing due to insufficient amplitude or a
lack of pulses in the incoming line signal) then it de-
clares a Loss of Signal (LOS) condition. The
XRT73LC00A declares the LOS condition by toggling
LOS D
ECLARATION
/C
LEARANCE
the RLOS output pin “High” and by setting the RLOS
bit field in Command Register 0 to “1”.
If the XRT73LC00A determines that the incoming line
signal has been restored (e.g., there is sufficient am-
plitude and pulses in the incoming line signal) then it
clears the LOS condition by toggling the RLOS output
pin “Low” and setting the RLOS bit-field to “0”.
The LOS Declaration/Clearance scheme that is em-
ployed in the XRT73LC00A is based upon ITU-T Rec-
ommendation G.775 for both E3 and DS3 applica-
tions. The LOS Declaration and Clearance criteria
that the XRT73LC00A uses for each of these modes
(e.g., E3 and DS3) are presented below.
3.6.1
The LOS Declaration/Clearance Criteria
for E3 Applications
When the XRT73LC00A is operating in the E3 Mode,
it declares an LOS Condition if the signal amplitude
drops to -35dB or below. The XRT73LC00A clears
the LOS Condition if the signal amplitude rises back
up to -15dB or above. Figure 22 illustrates the signal
levels at which the XRT73LC00A asserts and clears
LOS.
Timing Requirements associated with Declaring
and Clearing the LOS Indicator for E3 Applica-
tions
The XRT73LC00A was designed to meet the ITU-T
G.775 specification timing requirements for declaring
and clearing the LOS indicator. The XRT73LC00A
declares an LOS between 10 and 255 UI or E3 bit-pe-
riods after the actual time the LOS condition oc-
curred. The XRT73LC00A clears the LOS indicator
within 10 to 255 UI after restoration of the incoming
COMMAND REGISTER CR2 (ADDRESS = 0X02)
D4
D3
D2
D1
D0
Reserved ENDECDIS ALOSDIS DLOSDIS REQDIS
X
0
X
X
X
F
IGURE
22. T
HE
S
IGNAL
L
EVELS
THAT
THE
XRT73LC00A D
ECLARES
AND
C
LEARS
LOS (E3 M
ODE
O
NLY
)
0 dB
-12 dB
-15dB
-35dB
Maximum Cable Loss for E3
LOS Signal Must be Declared
LOS Signal Must be Cleared
LOS Signal may be Cleared or Declared
相關(guān)PDF資料
PDF描述
XRT73LC00AIV E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73LC03A 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73LC03AIV 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73LC04A 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73LC04AIV 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT73LC00A_08 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73LC00AES 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT73LC00AIV 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT73LC00AIV-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 1-Ch DS3, E3, SONET RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT73LC00AIVTR 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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