參數(shù)資料
型號: XRT73LC04AIV-F
廠商: Exar Corporation
文件頁數(shù): 41/64頁
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 4CH 144LQFP
標(biāo)準(zhǔn)包裝: 60
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 4/4
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-LQFP(20x20)
包裝: 托盤
XRT73LC04A
42
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.2
clearing ALOS_(n) in order to prevent chattering in
the RLOS_(n) output signal.
Monitoring the State of ALOS_(n)
If the XRT73LC04A is operating in the HOST Mode,
the state of ALOS_(n) of Channel(n) can be polled or
monitored by reading in the contents of Command
Register CR0. .
If the ALOS_(n) bit-field contains a "1", then the cor-
responding Channel(n) is currently declaring an
ALOS condition. Conversely, if the ALOS_(n) bit-field
contains a "0", then the channel is not currently de-
claring an ALOS condition.
Disabling the ALOS Detector
For debugging purposes, it may be useful to disable
the ALOS Detector. If the XRT73LC04A is operating
in the HOST Mode, disable the Channel(n) ALOS De-
tector by writing a "1" into the ALOSDIS_(n) bit-field
in Command Register CR2.
2. The Digital LOS (DLOS) Declaration/Clearance
Criteria
A given channel(n) declares a Digital LOS
(DLOS_(n)) condition if the XRT73LC04A detects
160±32 or more consecutive "0’s" in the incoming da-
ta.
The channel clears DLOS if it detects four consecu-
tive sets of 32 bit-periods, each of which contains at
least 10 "1’s" (e.g., average pulse density of greater
than 33%).
Monitoring the State of DLOS
If the XRT73LC04A is operating in the HOST Mode
the state of DLOS_(n) of Channel(n) can be polled or
monitored by reading in the contents of Command
Register CR0.
If the DLOS_(n) bit-field contains a “1”, then the cor-
responding channel(n) is currently declaring a DLOS
condition. If the DLOS_(n) bit-field contains a “0”,
then the channel(n) is currently declaring the DLOS
condition.
Disabling the DLOS Detector
For debugging purposes, it is useful to disable the
DLOS_(n) detector. If the XRT73LC04A is operating
in the HOST Mode, the DLOS Detector can be dis-
abled by writing a “1” into the DLOSDIS_(n) bit-field in
Command Register CR2.
NOTE: Setting both the ALOSDIS_(n) and DLOSDIS_(n)
bit-fields to "1" disables LOS Declaration by Channel(n).
3.5.3
Muting the Recovered Data while the LOS
is being Declared
COMMAND REGISTER CR0-(n)
D4
D3
D2
D1
D0
RLOL_(n)
RLOS_(n)
ALOS_(n)
DLOS_(n)
DMO_(n)
Read Only
COMMAND REGISTER CR2-(n)
D4
D3
D2
D1
D0
Reserved
ALOSDIS_(n)
DLOSDIS_(n)
REQEN_(n)
X
1
X
COMMAND REGISTER CR0-(n)
D4
D3
D2
D1
D0
RLOL_(n) RLOS_(n) ALOS_(n) DLOS_(n) DMO_(n)
Read Only Read Only Read Only Read Only Read Only
COMMAND REGISTER CR2-(n)
D4
D3
D2
D1
D0
Reserved
ALOSDIS_(n)
DLOSDIS_(n)
REQEN_(n)
X
1
X
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