XRT74L74
4 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
ADVANCED CONFIDENTIAL
REV. P1.1.1
290
It will set Bit 2 (AIC Interrupt Status), within the Rx
DS3 Interrupt Status Register, to “1”, as indicated
below.
Whenever the Terminal Equipment encounters this in-
terrupt, it should do the following.
It should continue to check the state of the AIC bit,
in order to see if this change is constant.
If this change is constant, then the user should con-
figure the XRT74L74 Framer IC to operate in the
M13 framing format, if the AIC bit-field is “0”.
Conversely, if the AIC bit-field is “1”, then the user
should configure the XRT74L74 Framer IC to oper-
ate in the C-bit Parity framing format.
5.3.6.2.7
The Detection of P-Bit Error Interrupt
If the Detection of P-Bit Error Interrupt is enabled,
then the XRT74L74 Framer IC will generate an inter-
rupt, anytime the Receive DS3 Framer block has de-
tected a P-bit error, within the incoming DS3 data
stream.
Enabling and Disabling the Detection of P-Bit Er-
ror Interrupt:
The Detection of P-Bit Error Interrupt can be enabled
or disabled by writing the appropriate value into Bit 0
(P-Bit Error Interrupt Enable) within the RxDS3 Inter-
rupt Enable Register, as illustrated below.
Setting this bit-field to “1” enables this interrupt. Con-
versely, setting this bit-field to “0” disables this inter-
rupt.
Servicing the Detection of P-Bit Error Interrupt
Whenever the XRT74L74 Framer IC detects this in-
terrupt, it will do all of the following.
It will assert the Interrupt Request output pin (INT)
by driving it "High".
It will set Bit 0 (P-Bit Error Interrupt Status) within
the Rx DS3 Interrupt Status Register, to “1”, as indi-
cated below.
Whenever the Terminal Equipment encounters the
Detection of P-bit Error Interrupt, It should read the
contents of PMON Parity Error Count Register (locat-
ed at 0x54 and 0x55), in order to determine the num-
ber of P-bit errors recently received.
RXDS3 INTERRUPT STATUS REGISTER (ADDRESS = 0X13)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
CP-Bit Error
Interrupt
Status
RUR
0
LOS
Interrupt
Status
RUR
0
AIS
Interrupt
Status
RUR
0
Idle Interrupt
Status
FERF
Interrupt
Status
RUR
0
AIC
Interrupt
Status
RUR
1
OOF
Interrupt
Status
RUR
0
P-Bit Error
Interrupt
Status
RUR
0
RUR
0
RXDS3 INTERRUPT ENABLE REGISTER (ADDRESS = 0X12)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
CP Bit Error
Interrupt
Enable
R/W
0
LOS
Interrupt
Enable
R/W
0
AIS
Interrupt
Enable
R/W
0
Idle Interrupt
Enable
FERF
Interrupt
Enable
R/W
0
AIC
Interrupt
Enable
R/W
0
OOF
Interrupt
Enable
R/W
0
P-Bit Error
Interrupt
Enable
R/W
0
R/W
0
RXDS3 INTERRUPT STATUS REGISTER (ADDRESS = 0X13)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
CP-Bit Error
Interrupt
Status
RUR
0
LOS
Interrupt
Status
RUR
0
AIS
Interrupt
Status
RUR
0
Idle Interrupt
Status
FERF
Interrupt
Status
RUR
0
AIC
Interrupt
Status
RUR
0
OOF
Interrupt
Status
RUR
0
P-Bit Error
Interrupt
Status
RUR
1
RUR
0