參數(shù)資料
型號: XRT75R06IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
中文描述: DATACOM, PCM TRANSCEIVER, PBGA217
封裝: 23 X 23 MM, BGA-217
文件頁數(shù): 54/63頁
文件大?。?/td> 350K
代理商: XRT75R06IB
XRT75R06
REV. 1.0.0
á
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
51
0x03 (ch 0)
0x13 (ch 1)
0x23 (ch 2)
0x33 (ch 3)
0x43 (ch 4)
0x53 (ch 5)
Alarm Status
(read only)
Reserved PRBSLS_n
DLOS_n
ALOS_n
FL_n
RLOL_n
RLOS_n
DMO_n
0x04 (ch 0)
0x14 (ch 1)
0x24 (ch 2)
0x34 (ch 3)
0x44 (ch 4)
0x54 (ch 5)
Transmit
Control
(read/write)
Reserved
TxMON_n INSPRBS
_n
Reserved
TAOS_n
TxCLKINV
_n
TxLEV_n
0x05 (ch 0)
0x15 (ch 1)
0x25 (ch 2)
0x35 (ch 3)
0x45 (ch 4)
0x55 (ch 5)
Receive
Control
(read/write)
Reserved
DLOSDIS
_n
ALOSDIS
_n
RxCLKIN
V_n
LOSMUT_
n
RxMON_n REQEN_
n
0x06 (ch 0)
0x16 (ch 1)
0x26 (ch 2)
0x36 (ch 3)
0x46 (ch 4)
0x56 (ch 5)
Block Control
(read/write)
Reserved CLKOUTE
N_n
PRBSEN_
0
RLB_n
LLB_n
E3_n
STS1/
DS3_n
SR/DR_n
0x07 (ch 0)
0x17 (ch 1)
0x27 (ch 2)
0x37 (ch 3)
0x47 (ch 4)
0x57 (ch 5)
Jitter
Attenuator
Control
(read/write)
Reserved
DFLCK_n PNTRST_
n
JA1_n
JATx/Rx_n
JA0_n
0x0A (ch 0)
0x1A (ch 1)
0x2A (ch 2)
0x3A (ch 3)
0x4A (ch 4)
0x5A (ch 5)
PRBS Error
Count Reg.
MSB
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
0x0B (ch 0)
0x1B (ch 1)
0x2B (ch 2)
0x3B (ch 3)
0x4B (ch 4)
0x5B (ch 5)
PRBS Error
Count Reg.
LSB
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x0C (ch 0)
0x1C (ch 1)
0x2C (ch 2)
0x3C (ch 3)
0x4C (ch 4)
0x5C (ch 5)
PRBS Error
Count Holding
Register
T
ABLE
17: R
EGISTER
M
AP
AND
B
IT
N
AMES
- C
HANNEL
N
R
EGISTERS
(
N
= 0,1,2,3,4,5)
A
DDRESS
(H
EX
)
P
ARAMETER
N
AME
D
ATA
B
ITS
7
6
5
4
3
2
1
0
相關(guān)PDF資料
PDF描述
XRT75R12D TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
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