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參數(shù)資料
| 型號： | XRT79L72IB |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | 2 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| 中文描述： | ATM NETWORK INTERFACE, PBGA456 |
| 封裝： | 27 X 27 MM, 1 MM PITCH, PLASTIC, BGA-456 |
| 文件頁數(shù)： | 21/72頁 |
| 文件大?。?/td> | 441K |
| 代理商： | XRT79L72IB |
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xr
2 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
PRELIMINARY
XRT79L72
REV. P1.0.2
18
C7
TxUPrty/
TxPPrty
I
Transmit UTOPIA Data Bus - Parity Input/Transmit POS-PHY Interface - Par-
ity Input:
The function of this input pin depends upon whether the XRT79L72 has been
configured to operate in the ATM UNI or PPP Mode.
ATM UNI Mode - TxUPrty:
The ATM Layer processor will apply the parity value of the byte or word which is
being applied to the Transmit UTOPIA Data Bus (e.g., TxUData[7:0] or TxU-
Data[15:0]) inputs of the XRT79L72, respectively.
N
OTE
:
This parity value should be computed based upon the odd-parity of the
data applied at the Transmit UTOPIA Data Bus.
The Transmit UTOPIA Interface block within the XRT79L72 will independently
compute an odd-parity value of each byte (or word) that it receives from the ATM
Layer processor and will compare it with the logic level of this input pin.
PPP Mode - TxPPrty:
The Link Layer Processor will apply the parity value of the byte or word which is
being applied to the Transmit POS-PHY Data Bus (e.g., TxPData[7:0] or TxP-
Data[15:0]) inputs of the XRT79L72, respectively.
N
OTE
:
This parity value should be computed based upon the odd-parity of the
data applied to the Transmit POS-PHY Data Bus. The Transmit POS-PHY Inter-
face block within the XRT79L72 will independently compute an odd-parity value
of each byte (or word) that it receives from the Link Layer processor and will
compare it will the logic level of this input pin. This input pin is only active if the
user has configured the XRT79L72 device to operate in either the ATM UNI or
the PPP Mode. The user should tie this input pin to GND if he/she intends to
operate the XRT79L72 device in either the Clear-Channel Framer or High-Speed
HDLC Controller Modes.
D7
TxUEN/
TxPEN
I
Transmit UTOPIA Interface Block - Write Enable/Transmit POS-PHY Inter-
face - Write Enable:
The exact function of this input pin depends upon whether the XRT79L72 device
has been configured to operate in the ATM UNI or PPP Mode.
ATM UNI Mode Operation - TxUENB* - Transmit UTOPIA Interface - Write
Enable Input pin:
This active-low signal, from the ATM Layer processor enables the data on the
Transmit UTOPIA Data Bus to be latched and written into the TxFIFO on the ris-
ing edge of TxUClk. When this signal is asserted (e.g., pulled to a logic "LOW"
level), then the contents of the byte or word that is present, on the Transmit UTO-
PIA Data Bus (TxUData[15:0]), will be latched into the Transmit UTOPIA Inter-
face block, on the rising edge of TxUClk. When this signal is negated, then the
Transmit UTOPIA Data bus inputs will be tri-stated.
PPP Mode Operation - TxPENB*
This active-low signal, from the Link Layer processor enables the data on the
Transmit POS-PHY Data Bus to latched and be written into the TxFIFO on the
rising edge of TxPClk. When this signal is asserted (e.g., pulled to a logic "LOW"
level), then the contents of the byte or word that is present, on the Transmit POS-
PHY Data Bus (TxPData[15:0]), will be latched into the Transmit POS-PHY Inter-
face block, on the rising edge of TxPClk.When this signal is negated, then the
Transmit POS-PHY Data bus inputs will be tri-stated.
N
OTE
:
This input pin is only active if the XRT79L72 device has been configured
to operate in the ATM UNI or PPP Mode. The user should tie this input pin to
GND if he/she intends to operate the XRT79L72 device in either the Clear-Chan-
nel Framer or High-Speed HDLC Controller Mode.
P
IN
#
N
AME
TYPE
D
ESCRIPTION
相關PDF資料 |
PDF描述 |
|---|---|
| XRT79L73 | 3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L73IB | 3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L74 | 4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L74IB | 4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT8000ID | Clock Synchronizer/Adapter for Communications |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XRT79L73 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L73IB | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L74 | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L74IB | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT8000 | 制造商:EXAR 制造商全稱:EXAR 功能描述:Clock Synchronizer/Adapter for Communications |
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