Rev. 1.01 LDETDIS[2:1] Signal output via the LOCKDET Signal 00 The LOCK Condition of PLL1 AND PLL2 With this selection, the LOCKDET " />
參數(shù)資料
型號： XRT8001ID-F
廠商： Exar Corporation
文件頁數(shù)： 13/48頁
文件大?。?/td> 0K
描述： IC WAN T1/E1 DUAL 18SOIC
標(biāo)準(zhǔn)包裝： 20
類型： 時鐘/頻率發(fā)生器
PLL： 是
主要目的： 以太網(wǎng)（WAN），T1/E1
輸入： 時鐘
輸出： 時鐘
電路數(shù)： 1
比率 - 輸入:輸出： 1:2
差分 - 輸入:輸出： 無/無
頻率 - 最大： 16.384kHz
電源電壓： 3.3 V ~ 5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 18-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 18-SOIC
包裝： 管件
其它名稱： 1016-1358-5
XRT8001
20
Rev. 1.01
LDETDIS[2:1]
Signal output via the LOCKDET Signal
00
The LOCK Condition of PLL1 AND PLL2
With this selection, the LOCKDET output pin will be “high” if either one of the
following conditions are true.
a.
If both PLL1 and PLL2 are in the “LOCK” condition, (applies if both PLL1 and
PLL2 are enabled) or
b.
If the only enabled PLL is in the “LOCK” condition (applies only if one of the
PLLs are enabled).
01
The LOCK Condition of PLL2 Only
With this selection, only the “LOCK” state of PLL2 will be reflected in the LOCKDET
output pin.
LOCKDET = “high” if PLL2 is in “LOCK”.
LOCKDET = “l(fā)ow” if PLL2 is out of “LOCK”.
10
The LOCK Condition of PLL1 Only
With this selection, only the “LOCK” state of PLL1 will be reflected in the LOCKDET
output pin.
LOCKDET = “high” if PLL1 is in “LOCK”.
LOCKDET = “l(fā)ow” if PLL1 is out of “LOCK”.
11
LOCKDET will be unconditionally pulled to “LOW”
Table 3. Relationship Between the Values of the LDETDIS[2:1]
Bit-Fields and the Meaning of the LOCKDET Output Signal
4.0 Instructions for Configuring the XRT8001 WAN
Clock
As mentioned earlier, the XRT8001 WAN Clock can be
configured to operate in the following modes:
The “Forward/Master” Mode
The “Reverse/Master” Mode
The “Fractional T1/E1 Reverse/Master” Mode
The “E1 to T1 – Forward/Master” Mode
The “High Speed – Reverse” Mode
The “Forward/Slave” Mode
A detailed description of the operation and the configu-
ration steps for each of these configurations follows.
4.1 The “Forward/Master” Mode.
When the XRT8001 WAN Clock has been configured to
operate in the “Forward/Master” Mode, then it will
accept an “N x 1.544MHz” or an “N x 2.048MHz” clock
signal via the “Reference Clock” input at FIN (pin 3);
where “N” can range anywhere between 1 and 16. In
response to this clock signal, the XRT8001 WAN Clock
will output either a “K x 56kHz” or a “K x 64kHz” clock
signal, via the Clock Output pins (CLK1 and/or CLK2).
A simple illustration of the XRT8001 WAN Clock,
operating in the “Forward/Master” Mode is shown in
figure 13.
相關(guān)PDF資料
PDF描述
XRT8000ID-F IC WAN CLOCK E1/E1 DUAL 18SOIC
D38999/24FH53SA CONN RCPT 53POS JAM NUT W/SCKT
VE-BW0-MW-F2 CONVERTER MOD DC/DC 5V 100W
MS3110F22-55SY CONN RCPT 55POS WALL MNT W/SCKT
VE-BW0-MW-F1 CONVERTER MOD DC/DC 5V 100W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT8001ID-F 制造商:Exar Corporation 功能描述:WAN Clock IC
XRT8001IDTR-F 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
XRT8001IP 制造商:EXAR 制造商全稱:EXAR 功能描述:WAN Clock for T1 and E1 Systems
XRT8001IP-F 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
XRT8010 制造商:EXAR 制造商全稱:EXAR 功能描述:312MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS
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