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參數(shù)資料
型號： XRT83SL38IB
廠商： Exar Corporation
文件頁數(shù)： 11/88頁
文件大?。?/td> 0K
描述： IC LIU SH T1/E1/J1 OCTAL 225BGA
標準包裝： 84
類型： 線路接口裝置（LIU）
驅動器/接收器數(shù)： 8/8
規(guī)程： T1，E1，J1
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 225-BGA
供應商設備封裝： 225-BGA（19x19）
包裝： 托盤
XRT83SL38
17
REV. 1.0.2
OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
ALARM FUNCTIONS/REDUNDANCY SUPPORT
SIGNAL NAME
LEAD #
TYPE
DESCRIPTION
GAUGE
J18
I
Twisted Pair Cable Wire Gauge Select - Hardware Mode
Connect this pin “High” to select 26 Gauge wire. Connect this pin “Low” to select 22
and 24 gauge wire for all channels.
NOTE: Internally pulled “Low” with a 50k
Ω resistor.
DMO_0
DMO_1
DMO_2
DMO_3
DMO_4
DMO_5
DMO_6
DMO_7
D5
D4
C15
C13
R5
P4
U17
V14
O
Driver Failure Monitor Channel _0:
This pin transitions “High” if a short circuit condition is detected in the transmit driver of
Channel _0, or no transmit output pulse is detected for more than 128 TCLK_0 cycles.
Driver Failure Monitor Channel _1
Driver Failure Monitor Channel _2
Driver Failure Monitor Channel _3
Driver Failure Monitor Channel _4
Driver Failure Monitor Channel _5
Driver Failure Monitor Channel _6
Driver Failure Monitor Channel _7
ATAOS
PCLK
T13
I
Automatic Transmit “All Ones” Pattern - Hardware Mode
A "High" level on this pin enables the automatic transmission of an "All Ones" AMI pat-
tern from the transmitter of any channel that the receiver of that channel has detected
an LOS condition. A "Low" level on this pin disables this function.
Note: All channels share the same ATAOS control function.
Microprocessor Clock Input - Host mode
NOTE: This pin is internally pulled “Low” for asynchronous microprocessor interface
when no clock is present.
TRATIO
INT
L16
I
O
Transmitter Transformer Ratio Select - Hardware mode
In external termination mode (TXTSEL = 0), setting this pin “High” selects a trans-
former ratio of 1:2 for the transmitter. A “Low” on this pin sets the transmitter trans-
former ratio to 1:2.45. In the internal termination mode the transmitter transformer
ratio is permanently set to 1:2 and the state of this pin is ignored.
Interrupt Output - Host mode
This pin is asserted “Low” to indicate an alarm condition.
NOTE: This pin is an open drain output and requires an external 10k
Ω pull-up resistor.
RESET
T8
I
Hardware Reset (Active “Low”):
When this pin is tied “Low” for more than 10s, the device is put in the reset state.
Exar recommends initiating a Hardware reset upon power up.
NOTE: This pin is internally pulled “High” with a 50k
Ω resistor.
SR/DR
K4
I
Single-Rail/Dual-Rail Data Format:
Connect this pin “Low” to select transmit and receive data format in Dual-Rail mode. In
this mode, HDB3 or B8ZS encoder and decoder are not available.
Connect this pin “High” to select single-rail data format.
NOTE: Internally pulled “Low” with a 50k
Ω resistor.
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參數(shù)描述
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XRT83SL38IV 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
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