參數(shù)資料
型號: XRT83SL38IB
廠商: Exar Corporation
文件頁數(shù): 27/88頁
文件大?。?/td> 0K
描述: IC LIU SH T1/E1/J1 OCTAL 225BGA
標準包裝: 84
類型: 線路接口裝置(LIU)
驅動器/接收器數(shù): 8/8
規(guī)程: T1,E1,J1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 225-BGA
供應商設備封裝: 225-BGA(19x19)
包裝: 托盤
XRT83SL38
31
REV. 1.0.2
OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
TRANSMIT AND RECEIVE TERMINATIONS
The XRT83SL38 is a versatile LIU that can be programmed to use one Bill of Materials (BOM) for worldwide
applications for T1, J1 and E1. For specific applications the internal terminations can be disabled to allow the
use of existing components and/or designs.
RECEIVER (CHANNELS 0 - 7)
INTERNAL RECEIVE TERMINATION MODE
In Hardware mode, RXTSEL (Pin 83) can be tied “High” to select internal termination mode for all receive
channels or tied “Low” to select external termination mode. Individual channel control can only be done in Host
mode. By default the XRT83SL38 is set for external termination mode at power up or at Hardware reset.
In Host mode, bit 7 in the appropriate channel register, (Table 20, “Microprocessor Register #1, Bit
Description,” on page 52), is set “High” to select the internal termination mode for that specific receive
channel.
1
0
E1 Gain Mode
ITU G.703/Arbitrary
75
Ω Coax
HDB3
1
E1 Gain Mode
ITU G.703/Arbitrary
120
Ω TP
HDB3
TABLE 6: RECEIVE TERMINATION CONTROL
RXTSEL
RX TERMINATION
0
EXTERNAL
1
INTERNAL
FIGURE 10. SIMPLIFIED DIAGRAM FOR THE INTERNAL RECEIVE AND TRANSMIT TERMINATION MODE
TABLE 5: RECEIVE EQUALIZER CONTROL AND TRANSMIT LINE BUILD-OUT SETTINGS
EQC4
EQC3
EQC2
EQC1
EQC0
E1/T1 MODE & RECEIVE
SENSITIVITY
TRANSMIT LBO
CABLE
CODING
T1
TTIP
TRING
5
8
1:2
75
Ω , 100 Ω
110
Ω or 120 Ω
4
1
0.68
μ F
R
int
R
int
TTIP
TRIN G
TX
Line Driver
T2
RTIP
RR ING
1
4
1:1
8
5
RTIP
RRING
RX
Equilizer
R
int
Channel _n
TPOS
TNEG
TCLK
RPO S
RNEG
RCLK
75
Ω , 100 Ω
110
Ω or 120 Ω
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