TABLE
參數(shù)資料
型號(hào): XRT86VL38IB
廠商: Exar Corporation
文件頁數(shù): 8/160頁
文件大?。?/td> 0K
描述: IC LIU/FRAMER T1/E1/J1 8CH 420BG
標(biāo)準(zhǔn)包裝: 40
控制器類型: T1/E1/J1 調(diào)幀器,LIU
電源電壓: 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 420-BBGA
供應(yīng)商設(shè)備封裝: 420-PBGA
包裝: 托盤
XRT86VL38
100
REV. V1.2.0
OCTAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
TABLE 85: FRAMER INTERRUPT ENABLE REGISTER (FIER)
HEX ADDRESS: 0XnB05
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
5
SIG_ENB
R/W
0
Change in Signaling Bits Interrupt Enable
This bit permits the user to either enable or disable the “Change in
Signaling Bits” Interrupt, within the XRT86VL38 device. If the user
enables this interrupt, then the Receive T1 Framer block will gener-
ate an interrupt when it detects a change in the any four signaling
bits (A,B,C,D) in any one of the 24 signaling channels. Users can
read the signaling change registers (address 0xn10D-0xn10F) to
determine which signalling channel has changed state.
0 - Disables the Change in Signaling Bits Interrupt
1 - Enables the Change in Signaling Bits Interrupt
NOTE:
This bit has no meaning when Robbed-Bit Signaling is
disabled.
4
COFA_ENB
R/W
0
Change of Framing Alignment (COFA) Interrupt Enable
This bit permits the user to either enable or disable the “Change in
FAS Framing Alignment (COFA)” Interrupt, within the XRT86VL38
device. If the user enables this interrupt, then the Receive T1
Framer block will generate an interrupt when it detects a Change of
Framing Alignment Signal (e.g., the Framing bits have appeared to
move to a different location within the incoming T1 data stream).
0 - Disables the “Change of Framing Alignment (COFA)” Interrupt.
1 - Enables the “Change of Framing Alignment (COFA)” Interrupt.
3
LOF_ENB
R/W
0
Change in Loss of Frame Condition interrupt enable
This bit permits the user to either enable or disable the “Change in
Loss of Frame Condition” Interrupt, within the XRT86VL38 device. If
the user enables this interrupt, then the Receive T1 Framer block
will generate an interrupt in response to either one of the following
conditions.
1. The instant that the Receive T1 Framer block declares the
Loss of Frame condition.
2. The instant that the Receive T1 Framer block clears the Loss
of Frame condition.
0 – Disables the “Change in Loss of Frame Condition” Interrupt.
1 – Enables the “Change in Loss of Frame Condition” Interrupt.
2
FMD_ENB
R/W
0
Frame Mimic Detection Interrupt Enable
This bit permits the user to either enable or disable the “Frame
Mimic Detection” Interrupt, within the XRT86VL38 device. If the user
enables this interrupt, then the Receive T1 Framer block will gener-
ate an interrupt when it detects the presence of Frame mimic bits
(i.e., the payload bits have appeared to mimic the framing bit pattern
within the incoming T1 data stream).
0 - Disables the “Frame Mimic Detection” Interrupt.
1 - Enables the “Frame Mimic Detection” Interrupt.
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