參數(shù)資料
型號： XRT86VX38IB329-F
廠商： Exar Corporation
文件頁數(shù)： 28/61頁
文件大小： 0K
描述： IC TI/E1/J1 FRAMER/LIU 329FPBGA
標準包裝： 90
控制器類型： T1/E1/J1 調(diào)幀器，LIU
電源電壓： 3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 329-FBGA
供應(yīng)商設(shè)備封裝： 329-FPBGA（17x17）
包裝： 散裝
其它名稱： 1016-1439
XRT86VX38
31
OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
REV. 1.0.3
ALE / AS
K17
J16
I
-
Address Latch Enable Input Address Strobe
The exact behavior of this pin depends upon the type of
Microprocessor/Microcontroller the XRT86VX38 has been
configured to operate in, as defined by the PTYPE[2:0]
pins.
Intel-Asynchronous Mode - ALE
This active-high input pin is used to latch the address
(present at the Microprocessor Interface Address Bus pins
(A[14:0]) into the XRT86VX38 Microprocessor Interface
block and to indicate the start of a READ or WRITE cycle.
Pulling this input pin “high” enables the input bus drivers for
the Address Bus input pins (A[14:0]). The contents of the
Address Bus will be latched into the XRT86VX38 Micropro-
cessor Interface circuitry, upon the falling edge of this input
signal.
Motorola-Asynchronous (68K) Mode - AS
This active-low input pin is used to latch the data residing
on the Address Bus, A[14:0] into the Microprocessor Inter-
face circuitry of the XRT86VX38 device.
Pulling this input pin “l(fā)ow” enables the input bus drivers for
the Address Bus input pins. The contents of the Address
Bus will be latched into the Microprocessor Interface cir-
cuitry, upon the falling edge of this signal.
Power PC 403 Mode - No Function -Tie to GND:
This input pin has no role nor function and should be tied to
GND.
CS
G19
F14
I
-
Microprocessor Interface—Chip Select Input:
The user must assert this active low signal in order to
select the Microprocessor Interface for READ and WRITE
operations between the Microprocessor and the
XRT86VX38 on-chip registers and buffer/memory loca-
tions.
MICROPROCESSOR INTERFACE
SIGNAL NAME
329 PKG
BALL#
256 PKG
BALL #
TYPE
OUTPUT
DRIVE (MA)
DESCRIPTION
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