參數(shù)資料
型號(hào): XRT91L30
廠商: Exar Corporation
英文描述: STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
中文描述: STS-12/STM-4或STS-3/STM-1的SONET / SDH收發(fā)器
文件頁(yè)數(shù): 39/40頁(yè)
文件大?。?/td> 387K
代理商: XRT91L30
xr
REV. P1.0.8
PRELIMINARY
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
XRT91L30
37
REVISION HISTORY
R
EVISION
#
D
ATE
D
ESCRIPTION
P1.0.0
January 2005
First draft of XRT91L30 datasheet.
P1.0.1
February 2005
Preliminary limited release version of XRT91L30 datasheet.
P1.0.2
February 2005
Corrected package type to IQ. Changed MHz to Mbps in PISO and SIPO section.
P1.0.3
March 2005
1.CAP1,CAP2,CAP3,CAP4 pin names changed to CAP1P, CAP2P, CAP1N,
CAP2N respectively.
2.Added “Section 2.3.1, Internal Clock and Data Recovery Bypass” on page 16
4.Corrected external receive loop filter capacitors from 0803 to 0603 industry size
in Section 2.4,External Receive Loop Filter Capacitors.
5.Corrected LOOPTIME bit description.
6.Enhanced " Section 2.2,Recieve Serial Data Input Timing, Section 2.3,Receive
Clock and Data Recovery.
7.Enhanced Section 3.2,Transmit Parallel Data Input Timing, Section 3.6,Clock
Multiplier Unit (CMU) and Re-Timer, and Section 3.7,Loop Timing and Clock Con-
trol.
8.Enhanced Loopback diagrams on "Section 4.0,diagnostic features."
P1.0.4
May 2005
1.Added PIO_CTRL pin description.
2.Removed support for pull-ups and pull-downs on all control input pins except
PIO_CTRL.
3.Added internal biasing notes in REFCLKP/N pin description.
4.Corrected V
OCOMM
, V
IH
, and V
IDIFF
, V
ICOMM
in LVPECL electrical characteris-
tics table.
5.Corrected typo "TXDOP/N" in table 2.
6.Added FIFO and PIO_CTRL control block in pertinent diagrams.
7.Revised Transmit Parallel Input Interface and added Transmit FIFO section.
8.Added Receive Jitter Tolerance parameter in CDR unit performance table.
P1.0.5
August 2005
1.Updated performance numbers. Removed TBD’s.
P1.0.6
September 2005 1.Updated transmit parallel clock timing information.
2.Fig. 3 RXIP/N and Fig. 17 TXOP/N changed to DC coupling.
P1.0.7
October 2005
1.Added intructions for unused pins in pin description and diagrams.
2.Removed external loop filter 0603 capacitor size requirement.
P1.0.8
January 2006
1.Changed TXPCLK_IO setup time ( t
TXDI_SU
) to 2ns.
2.Corrected RXDO[7:0] pin description to "update on falling edge".
3.Removed subscript on TXPCLK_IO in Table 10, Table 11, Table 12, &
Table 13.
4.Revised standards compliance list on page 2.
5.Changed CAP1P, CAP2P, CAP1N, CAP2N pin description title.
6.Revised Section 4.5 and 4.6.1.
7.Removed TA = 25°C test condition from electrical characteristics table.
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