參數(shù)資料
型號(hào): XRT91L31IQ
廠商: EXAR CORP
元件分類(lèi): 數(shù)字傳輸電路
英文描述: STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
中文描述: TRANSCEIVER, PQFP64
封裝: 10 X 10 MM, 2 MM HEIGHT, PLASTIC, QFP-64
文件頁(yè)數(shù): 12/41頁(yè)
文件大小: 356K
代理商: XRT91L31IQ
XRT91L31
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
xr
REV. 1.0.2
10
POWER AND GROUND
CAP1P
CAP2P
Analog
-
39
42
CDR Non-polarized External Filter Capacitor
C1 = 0.47
μ
F ± 10% tolerance
(Isolate from noise and place close to pin)
CAP1N
CAP2N
Analog
-
40
41
CDR Non-polarized External Filter Capacitor
C2 = 0.47
μ
F ± 10% tolerance
(Isolate from noise and place close to pin)
DLOSDIS
LVTTL,
LVCMOS
I
7
LOS (Los of Signal) Detect Disable
Disables internal LOS monitoring and automatic muting of
RXDO[7:0] upon LOS detection. LOS is declared when
a string
of 128 consecutive zeros occur on the line. LOS condition is
cleared when the 16 or more pulse transitions is detected for
128 bit period sliding window (see Figure 7.)
"Low" = Monitor and Mute received data upon LOS declaration
"High" = Disable internal LOS monitoring
LOSEXT
SE-LVPECL
I
33
LOS or Signal Detect Input from Optical Module
Active "Low." When active, this pin can force the received data
output bus RXDO[7:0] to a logic state of ’0’ per Figure 7.
"Low" = Forced LOS
"High" = Normal Operation
N
AME
T
YPE
P
IN
D
ESCRIPTION
VDD3.3
PWR
18, 31, 34, 47, 61
3.3V CMOS Power Supply
VDD3.3 should be isolated from the Analog VDD power supplies.
Use a ferrite bead along with an internal power plane separation.
The VDD3.3 power supply pins should have bypass capacitors to
the nearest ground.
AVDD3.3_TX
PWR
38
Analog 3.3V Transmitter Power Supply
AVDD3.3_TX should be isolated from the digital power supplies.
For best results, use a ferrite bead along with an internal power
plane separation. The AVDD3.3_TX power supply pins should
have bypass capacitors to the nearest ground.
AVDD3.3_RX
PWR
43
Analog 3.3V Receiver Power Supply
AVDD3.3_RX should be isolated from the digital power supplies.
For best results, use a ferrite bead along with an internal power
plane separation. The AVDD3.3_RX power supply pins should
have bypass capacitors to the nearest ground.
VDD_PECL
PWR
4, 10
3.3V Input/Output LVPECL Bus Power Supply
These pins require a 3.3V potential voltage for properly biasing
the Differential LVPECL input and output pins.
AGND_TX
PWR
37
Transmitter Analog Ground for 3.3V Analog Power Supplies
It is recommended that all ground pins of this device be tied
together.
N
AME
L
EVEL
T
YPE
P
IN
D
ESCRIPTION
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參數(shù)描述
XRT91L31IQ-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 8-Bit TTL 3.3V temp -45 to 85C;UART RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT91L31IQ-F 制造商:Exar Corporation 功能描述:SONET Transceiver IC
XRT91L31IQTR 功能描述:總線收發(fā)器 SONET/SDH, FULL DPLX 3.3V I/O, LOS, CMU RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L31IQTR-F 功能描述:總線收發(fā)器 SONET/SDH, FULL DPLX 3.3V I/O, LOS, CMU RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L32 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER