參數(shù)資料
型號(hào)： XRT91L31IQ
廠商： EXAR CORP
元件分類(lèi)： 數(shù)字傳輸電路
英文描述： STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
中文描述： TRANSCEIVER, PQFP64
封裝： 10 X 10 MM, 2 MM HEIGHT, PLASTIC, QFP-64
文件頁(yè)數(shù)： 2/41頁(yè)
文件大?。?/td> 356K
代理商： XRT91L31IQ
XRT91L31
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
xr
REV. 1.0.2
2
FEATURES
Targeted for SONET STS-12/STS-3 and SDH STM-4/STM-1 Applications
Selectable full duplex operation between STS-12/STM-4 standard rate of 622.08 Mbps or STS-3/STM-1
155.52 Mbps
Single-chip fully integrated solution containing parallel-to-serial converter, clock multiplier unit (CMU), serial-
to-parallel converter, clock data recovery (CDR) functions, and a SONET/SDH frame and byte boundary
detection circuit
Ability to disable and bypass onchip CDR for external based received reference clock recovery thru
Differential LVPECL input pins XRXCLKIP/N
8-bit LVTTL parallel data bus paths running at 77.76 Mbps in STS-12/STM-4 or 19.44 Mbps in STS-3/STM-1
mode of operation
Uses Differential LVPECL or Single-Ended LVTTL CMU reference clock frequencies of either 19.44 MHz or
77.76 MHz for both STS-12/STM-1 or STS-3/STM-1 operations
Optional use of 77.76 MHz Single-Ended LVTTL input for independent CDR reference clock operation
Able to Detect and Recover SONET/SDH frame boundary and byte align received data on the parallel bus
Diagnostics features include LOS monitoring and automatic received data mute upon LOS
Provides Local, Remote and Split Loop-Back modes as well as Loop Timing mode
Optional flexibility to re-configure the transmit parallel bus clock output to a clock input and accept timing
signal from the framer/mapper device to permit the framer/mapper device time domain to be synchronized
with the transceiver transmit timing.
Meets Telcordia, ANSI and ITU-T G.783 and G.825 SDH jitter requirements including T1.105.03 - 2002
SONET Jitter Tolerance specification, Bellcore TR-NWT-000253 and GR-253-CORE, GR-253 ILR SONET
Jitter specifications.
Complies with ANSI/TIA/EIA-644 and IEEE P1596.3 3.3V LVDS standard, 3.3V LVPECL, and JESD 8-B
LVTTL and LVCMOS standard.
Operates at 3.3V with 3.3V I/O
Less than 660mW in STS-3/STM-1 mode or 800mW in STS-12/STM-4 mode Typical Power Dissipation
Package: 10 x 10 x 2.0 mm 64-pin QFP
相關(guān)PDF資料
PDF描述
XRT91L32 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
XRT91L32IQ-F STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
XRT91L80 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L80_0507 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L80IB 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT91L31IQ-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 8-Bit TTL 3.3V temp -45 to 85C;UART RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT91L31IQ-F 制造商:Exar Corporation 功能描述:SONET Transceiver IC
XRT91L31IQTR 功能描述:總線收發(fā)器 SONET/SDH, FULL DPLX 3.3V I/O, LOS, CMU RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L31IQTR-F 功能描述:總線收發(fā)器 SONET/SDH, FULL DPLX 3.3V I/O, LOS, CMU RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L32 制造商:EXAR 制造商全稱:EXAR 功能描述:STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
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