xr
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
XRT91L32
REV. 1.0.2
II
F
IGURE
14. L
OOP
T
IMING
M
ODE
U
SING
I
NTERNAL
CDR
OR
AN
E
XTERNAL
R
ECOVERED
C
LOCK
....................................................... 25
3.6 TRANSMIT SERIAL OUTPUT CONTROL ..................................................................................................... 25
F
IGURE
15. T
RANSMIT
S
ERIAL
O
UTPUT
I
NTERFACE
BLOCK
.............................................................................................................. 25
4.0 DIAGNOSTIC FEATURES ...................................................................................................................26
4.1 SERIAL REMOTE LOOPBACK ..................................................................................................................... 26
F
IGURE
16. S
ERIAL
R
EMOTE
L
OOPBACK
......................................................................................................................................... 26
4.2 DIGITAL LOCAL LOOPBACK ....................................................................................................................... 26
F
IGURE
17. D
IGITAL
L
OCAL
L
OOPBACK
........................................................................................................................................... 26
4.3 ANALOG LOCAL LOOPBACK ...................................................................................................................... 27
F
IGURE
18. A
NALOG
L
OCAL
L
OOPBACK
.......................................................................................................................................... 27
4.4 SPLIT LOOPBACK ......................................................................................................................................... 27
F
IGURE
19. S
PLIT
L
OOPBACK
......................................................................................................................................................... 27
4.5 EYE DIAGRAM ............................................................................................................................................... 28
F
IGURE
20. STS-3/STM-1 E
YE
D
IAGRAM
...................................................................................................................................... 28
F
IGURE
21. STS-12/STM-4 E
YE
D
IAGRAM
.................................................................................................................................... 28
4.6 SONET JITTER REQUIREMENTS ................................................................................................................. 29
4.6.1 JITTER TOLERANCE:................................................................................................................................................ 29
F
IGURE
22. J
ITTER
T
OLERANCE
M
ASK
............................................................................................................................................ 29
F
IGURE
23. XRT91L32 M
EASURED
J
ITTER
T
OLERANCE
AT
622.08 M
BPS
STS-12/STM-4.............................................................. 30
F
IGURE
24. XRT91L32 M
EASURED
J
ITTER
T
OLERANCE
AT
155.52 M
BPS
STS-3/STM-1................................................................ 30
4.6.2 JITTER GENERATION................................................................................................................................................ 31
F
IGURE
25. XRT91L32 M
EASURED
E
LECTRICAL
P
HASE
N
OISE
T
RANSMIT
J
ITTER
G
ENERATION
AT
622.08 M
BPS
STS-12/STM4
USING
’1010’
OUTPUT
PATTERN
................................................................................................................................................. 31
5.0 ELECTRICAL CHARACTERISTICS ...................................................................................................32
A
BSOLUTE
M
AXIMUM
RATINGS ..................................................................................................................32
ABSOLUTE MAXIMUM POWER AND INPUT/OUTPUT RATINGS .........................................................32
POWER AND CURRENT DC E
LECTRICAL
C
HARACTERISTICS
....................................................................32
...................................................................................................................................................................32
LVPECL AND LVTTL LOGIC SIGNAL DC ELECTRICAL CHARACTERISTICS......................................33
ORDERING INFORMATION ..................................................................................................................34
PACKAGE DIMENSIONS................................................................................................34
R
EVISION
H
ISTORY
......................................................................................................................................35